License header and contributors

Author: shtaxxx

CONTRIBUTORS.md

@@ -0,0 +1,15 @@
+Main Committer
+====================
+
+- Shinya Takamaeda-Yamazaki (@shtaxxx)
+
+
+Contributors
+====================
+
+- ryosuke fukatani (@fukatani)
+- Leonard (Lenny) Truong (@leonardt)
+- @rsetaluri
+- @jinluyang
+- KISHIMOTO, Makoto (@metanest)
+- Tao Chen (@tc466)

MANIFEST.in

@@ -1,6 +1,6 @@
 include README.md
 include README.rst
-include LICENSE.txt
+include LICENSE
 include pytest.ini
 include .travis.yml
 include Makefile

README.md

@@ -5,16 +5,13 @@ Pyverilog
 
 Python-based Hardware Design Processing Toolkit for Verilog HDL
 
-Copyright (C) 2013, Shinya Takamaeda-Yamazaki
-
-E-mail: takamaeda\_at\_ist.hokudai.ac.jp
+Copyright 2013, Shinya Takamaeda-Yamazaki
 
 
 License
 ==============================
 
-Apache License 2.0
-(http://www.apache.org/licenses/LICENSE-2.0)
+Apache License 2.0 (http://www.apache.org/licenses/LICENSE-2.0)
 
 Note that this software package includes PLY-3.4 in "vparser/ply". The license of PLY is BSD.
 

README.rst

@@ -5,9 +5,7 @@ Pyverilog
 
 Python-based Hardware Design Processing Toolkit for Verilog HDL
 
-Copyright (C) 2013, Shinya Takamaeda-Yamazaki
-
-E-mail: takamaeda_at_ist.hokudai.ac.jp
+Copyright 2013, Shinya Takamaeda-Yamazaki
 
 License
 =======