@@ -152,23 +152,23 @@ struct spi_struct_t {
152152// clang-format off
153153static spi_t _spi_bus_array [] = {
154154#if CONFIG_IDF_TARGET_ESP32S2
155- {(volatile spi_dev_t * )(DR_REG_SPI1_BASE ), 0 , -1 , -1 , -1 , -1 },
156- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 1 , -1 , -1 , -1 , -1 },
157- {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), 2 , -1 , -1 , -1 , -1 }
155+ {(volatile spi_dev_t * )(DR_REG_SPI1_BASE ), 0 , -1 , -1 , -1 , -1 , false },
156+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 1 , -1 , -1 , -1 , -1 , false },
157+ {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), 2 , -1 , -1 , -1 , -1 , false }
158158#elif CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32P4
159- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 },
160- {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), 1 , -1 , -1 , -1 , -1 }
159+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 , false },
160+ {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), 1 , -1 , -1 , -1 , -1 , false }
161161#elif CONFIG_IDF_TARGET_ESP32C2
162- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 }
162+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 , false }
163163#elif CONFIG_IDF_TARGET_ESP32C3
164- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 }
164+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 , false }
165165#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
166- {(spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 }
166+ {(spi_dev_t * )(DR_REG_SPI2_BASE ), 0 , -1 , -1 , -1 , -1 , false }
167167#else
168- {(volatile spi_dev_t * )(DR_REG_SPI0_BASE ), 0 , -1 , -1 , -1 , -1 },
169- {(volatile spi_dev_t * )(DR_REG_SPI1_BASE ), 1 , -1 , -1 , -1 , -1 },
170- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 2 , -1 , -1 , -1 , -1 },
171- {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), 3 , -1 , -1 , -1 , -1 }
168+ {(volatile spi_dev_t * )(DR_REG_SPI0_BASE ), 0 , -1 , -1 , -1 , -1 , false },
169+ {(volatile spi_dev_t * )(DR_REG_SPI1_BASE ), 1 , -1 , -1 , -1 , -1 , false },
170+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), 2 , -1 , -1 , -1 , -1 , false },
171+ {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), 3 , -1 , -1 , -1 , -1 , false }
172172#endif
173173};
174174// clang-format on
@@ -180,22 +180,22 @@ static spi_t _spi_bus_array[] = {
180180
181181static spi_t _spi_bus_array [] = {
182182#if CONFIG_IDF_TARGET_ESP32S2
183- {(volatile spi_dev_t * )(DR_REG_SPI1_BASE ), NULL , 0 , -1 , -1 , -1 , -1 },
184- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 1 , -1 , -1 , -1 , -1 },
185- {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), NULL , 2 , -1 , -1 , -1 , -1 }
183+ {(volatile spi_dev_t * )(DR_REG_SPI1_BASE ), NULL , 0 , -1 , -1 , -1 , -1 , false },
184+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 1 , -1 , -1 , -1 , -1 , false },
185+ {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), NULL , 2 , -1 , -1 , -1 , -1 , false }
186186#elif CONFIG_IDF_TARGET_ESP32S3 || CONFIG_IDF_TARGET_ESP32P4
187- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 }, {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), NULL , 1 , -1 , -1 , -1 , -1 }
187+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 , false }, {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), NULL , 1 , -1 , -1 , -1 , -1 , false }
188188#elif CONFIG_IDF_TARGET_ESP32C2
189- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 }
189+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 , false }
190190#elif CONFIG_IDF_TARGET_ESP32C3
191- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 }
191+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 , false }
192192#elif CONFIG_IDF_TARGET_ESP32C6 || CONFIG_IDF_TARGET_ESP32H2
193- {(spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 }
193+ {(spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 0 , -1 , -1 , -1 , -1 , false }
194194#else
195- {(volatile spi_dev_t * )(DR_REG_SPI0_BASE ), NULL , 0 , -1 , -1 , -1 , -1 },
196- {(volatile spi_dev_t * )(DR_REG_SPI1_BASE ), NULL , 1 , -1 , -1 , -1 , -1 },
197- {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 2 , -1 , -1 , -1 , -1 },
198- {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), NULL , 3 , -1 , -1 , -1 , -1 }
195+ {(volatile spi_dev_t * )(DR_REG_SPI0_BASE ), NULL , 0 , -1 , -1 , -1 , -1 , false },
196+ {(volatile spi_dev_t * )(DR_REG_SPI1_BASE ), NULL , 1 , -1 , -1 , -1 , -1 , false },
197+ {(volatile spi_dev_t * )(DR_REG_SPI2_BASE ), NULL , 2 , -1 , -1 , -1 , -1 , false },
198+ {(volatile spi_dev_t * )(DR_REG_SPI3_BASE ), NULL , 3 , -1 , -1 , -1 , -1 , false }
199199#endif
200200};
201201#endif
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