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Merge pull request #2741 from fpistm/stm32cubef7_update
chore(f7): update to latest STM32CubeF7 v1.17.3
2 parents 9e0d259 + 8df1389 commit 2f4536d

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‎system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f722xx.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12824,7 +12824,7 @@ typedef struct
1282412824

1282512825
/******************* Bit definition for TIM_CCR5 register *******************/
1282612826
#define TIM_CCR5_CCR5_Pos (0U)
12827-
#define TIM_CCR5_CCR5_Msk (0xFFFFFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFFFFFF */
12827+
#define TIM_CCR5_CCR5_Msk (0xFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFF */
1282812828
#define TIM_CCR5_CCR5 TIM_CCR5_CCR5_Msk /*!<Capture/Compare 5 Value */
1282912829
#define TIM_CCR5_GC5C1_Pos (29U)
1283012830
#define TIM_CCR5_GC5C1_Msk (0x1UL << TIM_CCR5_GC5C1_Pos) /*!< 0x20000000 */

‎system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f723xx.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12846,7 +12846,7 @@ typedef struct
1284612846

1284712847
/******************* Bit definition for TIM_CCR5 register *******************/
1284812848
#define TIM_CCR5_CCR5_Pos (0U)
12849-
#define TIM_CCR5_CCR5_Msk (0xFFFFFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFFFFFF */
12849+
#define TIM_CCR5_CCR5_Msk (0xFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFF */
1285012850
#define TIM_CCR5_CCR5 TIM_CCR5_CCR5_Msk /*!<Capture/Compare 5 Value */
1285112851
#define TIM_CCR5_GC5C1_Pos (29U)
1285212852
#define TIM_CCR5_GC5C1_Msk (0x1UL << TIM_CCR5_GC5C1_Pos) /*!< 0x20000000 */

‎system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f730xx.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13069,7 +13069,7 @@ typedef struct
1306913069

1307013070
/******************* Bit definition for TIM_CCR5 register *******************/
1307113071
#define TIM_CCR5_CCR5_Pos (0U)
13072-
#define TIM_CCR5_CCR5_Msk (0xFFFFFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFFFFFF */
13072+
#define TIM_CCR5_CCR5_Msk (0xFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFF */
1307313073
#define TIM_CCR5_CCR5 TIM_CCR5_CCR5_Msk /*!<Capture/Compare 5 Value */
1307413074
#define TIM_CCR5_GC5C1_Pos (29U)
1307513075
#define TIM_CCR5_GC5C1_Msk (0x1UL << TIM_CCR5_GC5C1_Pos) /*!< 0x20000000 */

‎system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f732xx.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13047,7 +13047,7 @@ typedef struct
1304713047

1304813048
/******************* Bit definition for TIM_CCR5 register *******************/
1304913049
#define TIM_CCR5_CCR5_Pos (0U)
13050-
#define TIM_CCR5_CCR5_Msk (0xFFFFFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFFFFFF */
13050+
#define TIM_CCR5_CCR5_Msk (0xFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFF */
1305113051
#define TIM_CCR5_CCR5 TIM_CCR5_CCR5_Msk /*!<Capture/Compare 5 Value */
1305213052
#define TIM_CCR5_GC5C1_Pos (29U)
1305313053
#define TIM_CCR5_GC5C1_Msk (0x1UL << TIM_CCR5_GC5C1_Pos) /*!< 0x20000000 */

‎system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f733xx.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13069,7 +13069,7 @@ typedef struct
1306913069

1307013070
/******************* Bit definition for TIM_CCR5 register *******************/
1307113071
#define TIM_CCR5_CCR5_Pos (0U)
13072-
#define TIM_CCR5_CCR5_Msk (0xFFFFFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFFFFFF */
13072+
#define TIM_CCR5_CCR5_Msk (0xFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFF */
1307313073
#define TIM_CCR5_CCR5 TIM_CCR5_CCR5_Msk /*!<Capture/Compare 5 Value */
1307413074
#define TIM_CCR5_GC5C1_Pos (29U)
1307513075
#define TIM_CCR5_GC5C1_Msk (0x1UL << TIM_CCR5_GC5C1_Pos) /*!< 0x20000000 */

‎system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f745xx.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -13926,7 +13926,7 @@ typedef struct
1392613926

1392713927
/******************* Bit definition for TIM_CCR5 register *******************/
1392813928
#define TIM_CCR5_CCR5_Pos (0U)
13929-
#define TIM_CCR5_CCR5_Msk (0xFFFFFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFFFFFF */
13929+
#define TIM_CCR5_CCR5_Msk (0xFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFF */
1393013930
#define TIM_CCR5_CCR5 TIM_CCR5_CCR5_Msk /*!<Capture/Compare 5 Value */
1393113931
#define TIM_CCR5_GC5C1_Pos (29U)
1393213932
#define TIM_CCR5_GC5C1_Msk (0x1UL << TIM_CCR5_GC5C1_Pos) /*!< 0x20000000 */

‎system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f746xx.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14274,7 +14274,7 @@ typedef struct
1427414274

1427514275
/******************* Bit definition for TIM_CCR5 register *******************/
1427614276
#define TIM_CCR5_CCR5_Pos (0U)
14277-
#define TIM_CCR5_CCR5_Msk (0xFFFFFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFFFFFF */
14277+
#define TIM_CCR5_CCR5_Msk (0xFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFF */
1427814278
#define TIM_CCR5_CCR5 TIM_CCR5_CCR5_Msk /*!<Capture/Compare 5 Value */
1427914279
#define TIM_CCR5_GC5C1_Pos (29U)
1428014280
#define TIM_CCR5_GC5C1_Msk (0x1UL << TIM_CCR5_GC5C1_Pos) /*!< 0x20000000 */

‎system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f750xx.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14567,7 +14567,7 @@ typedef struct
1456714567

1456814568
/******************* Bit definition for TIM_CCR5 register *******************/
1456914569
#define TIM_CCR5_CCR5_Pos (0U)
14570-
#define TIM_CCR5_CCR5_Msk (0xFFFFFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFFFFFF */
14570+
#define TIM_CCR5_CCR5_Msk (0xFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFF */
1457114571
#define TIM_CCR5_CCR5 TIM_CCR5_CCR5_Msk /*!<Capture/Compare 5 Value */
1457214572
#define TIM_CCR5_GC5C1_Pos (29U)
1457314573
#define TIM_CCR5_GC5C1_Msk (0x1UL << TIM_CCR5_GC5C1_Pos) /*!< 0x20000000 */

‎system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f756xx.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14567,7 +14567,7 @@ typedef struct
1456714567

1456814568
/******************* Bit definition for TIM_CCR5 register *******************/
1456914569
#define TIM_CCR5_CCR5_Pos (0U)
14570-
#define TIM_CCR5_CCR5_Msk (0xFFFFFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFFFFFF */
14570+
#define TIM_CCR5_CCR5_Msk (0xFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFF */
1457114571
#define TIM_CCR5_CCR5 TIM_CCR5_CCR5_Msk /*!<Capture/Compare 5 Value */
1457214572
#define TIM_CCR5_GC5C1_Pos (29U)
1457314573
#define TIM_CCR5_GC5C1_Msk (0x1UL << TIM_CCR5_GC5C1_Pos) /*!< 0x20000000 */

‎system/Drivers/CMSIS/Device/ST/STM32F7xx/Include/stm32f765xx.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14508,7 +14508,7 @@ typedef struct
1450814508

1450914509
/******************* Bit definition for TIM_CCR5 register *******************/
1451014510
#define TIM_CCR5_CCR5_Pos (0U)
14511-
#define TIM_CCR5_CCR5_Msk (0xFFFFFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFFFFFF */
14511+
#define TIM_CCR5_CCR5_Msk (0xFFFFUL << TIM_CCR5_CCR5_Pos) /*!< 0xFFFF */
1451214512
#define TIM_CCR5_CCR5 TIM_CCR5_CCR5_Msk /*!<Capture/Compare 5 Value */
1451314513
#define TIM_CCR5_GC5C1_Pos (29U)
1451414514
#define TIM_CCR5_GC5C1_Msk (0x1UL << TIM_CCR5_GC5C1_Pos) /*!< 0x20000000 */

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