@@ -37,16 +37,12 @@ extern "C" {
3737#define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF
3838#define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR
3939#define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR
40- #if defined(STM32U5 ) || defined( STM32H7 ) || defined(STM32MP1 )
40+ #if defined(STM32H7 ) || defined(STM32MP1 )
4141#define CRYP_DATATYPE_32B CRYP_NO_SWAP
4242#define CRYP_DATATYPE_16B CRYP_HALFWORD_SWAP
4343#define CRYP_DATATYPE_8B CRYP_BYTE_SWAP
4444#define CRYP_DATATYPE_1B CRYP_BIT_SWAP
45- #if defined(STM32U5 )
46- #define CRYP_CCF_CLEAR CRYP_CLEAR_CCF
47- #define CRYP_ERR_CLEAR CRYP_CLEAR_RWEIF
48- #endif /* STM32U5 */
49- #endif /* STM32U5 || STM32H7 || STM32MP1 */
45+ #endif /* STM32H7 || STM32MP1 */
5046/**
5147 * @}
5248 */
@@ -279,7 +275,7 @@ extern "C" {
279275#define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE
280276#define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE
281277
282- #if defined(STM32G4 ) || defined(STM32L5 ) || defined( STM32H7 ) || defined (STM32U5 )
278+ #if defined(STM32G4 ) || defined(STM32H7 ) || defined (STM32U5 )
283279#define DAC_CHIPCONNECT_DISABLE DAC_CHIPCONNECT_EXTERNAL
284280#define DAC_CHIPCONNECT_ENABLE DAC_CHIPCONNECT_INTERNAL
285281#endif
@@ -476,7 +472,9 @@ extern "C" {
476472#define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE
477473#define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD
478474#define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD
475+ #if !defined(STM32F2 ) && !defined(STM32F4 ) && !defined(STM32F7 ) && !defined(STM32H7 )
479476#define PAGESIZE FLASH_PAGE_SIZE
477+ #endif /* STM32F2 && STM32F4 && STM32F7 && STM32H7 */
480478#define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE
481479#define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD
482480#define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD
@@ -552,6 +550,16 @@ extern "C" {
552550#define OB_SRAM134_RST_ERASE OB_SRAM_RST_ERASE
553551#define OB_SRAM134_RST_NOT_ERASE OB_SRAM_RST_NOT_ERASE
554552#endif /* STM32U5 */
553+ #if defined(STM32U0 )
554+ #define OB_USER_nRST_STOP OB_USER_NRST_STOP
555+ #define OB_USER_nRST_STDBY OB_USER_NRST_STDBY
556+ #define OB_USER_nRST_SHDW OB_USER_NRST_SHDW
557+ #define OB_USER_nBOOT_SEL OB_USER_NBOOT_SEL
558+ #define OB_USER_nBOOT0 OB_USER_NBOOT0
559+ #define OB_USER_nBOOT1 OB_USER_NBOOT1
560+ #define OB_nBOOT0_RESET OB_NBOOT0_RESET
561+ #define OB_nBOOT0_SET OB_NBOOT0_SET
562+ #endif /* STM32U0 */
555563
556564/**
557565 * @}
@@ -800,6 +808,21 @@ extern "C" {
800808#define GPIO_AF0_S2DSTOP GPIO_AF0_SRDSTOP
801809#define GPIO_AF11_LPGPIO GPIO_AF11_LPGPIO1
802810#endif /* STM32U5 */
811+
812+ #if defined(STM32WBA )
813+ #define GPIO_AF11_RF_ANTSW0 GPIO_AF11_RF
814+ #define GPIO_AF11_RF_ANTSW1 GPIO_AF11_RF
815+ #define GPIO_AF11_RF_ANTSW2 GPIO_AF11_RF
816+ #define GPIO_AF11_RF_IO1 GPIO_AF11_RF
817+ #define GPIO_AF11_RF_IO2 GPIO_AF11_RF
818+ #define GPIO_AF11_RF_IO3 GPIO_AF11_RF
819+ #define GPIO_AF11_RF_IO4 GPIO_AF11_RF
820+ #define GPIO_AF11_RF_IO5 GPIO_AF11_RF
821+ #define GPIO_AF11_RF_IO6 GPIO_AF11_RF
822+ #define GPIO_AF11_RF_IO7 GPIO_AF11_RF
823+ #define GPIO_AF11_RF_IO8 GPIO_AF11_RF
824+ #define GPIO_AF11_RF_IO9 GPIO_AF11_RF
825+ #endif /* STM32WBA */
803826/**
804827 * @}
805828 */
@@ -1243,10 +1266,10 @@ extern "C" {
12431266#define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1
12441267#define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1
12451268
1246- #if defined(STM32H5 )
1269+ #if defined(STM32H5 ) || defined( STM32H7RS )
12471270#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
12481271#define TAMP_SECRETDEVICE_ERASE_BKP_SRAM TAMP_DEVICESECRETS_ERASE_BKPSRAM
1249- #endif /* STM32H5 */
1272+ #endif /* STM32H5 || STM32H7RS */
12501273
12511274#if defined(STM32WBA )
12521275#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
@@ -1258,10 +1281,10 @@ extern "C" {
12581281#define TAMP_SECRETDEVICE_ERASE_ALL TAMP_DEVICESECRETS_ERASE_ALL
12591282#endif /* STM32WBA */
12601283
1261- #if defined(STM32H5 ) || defined(STM32WBA )
1284+ #if defined(STM32H5 ) || defined(STM32WBA ) || defined( STM32H7RS )
12621285#define TAMP_SECRETDEVICE_ERASE_DISABLE TAMP_DEVICESECRETS_ERASE_NONE
12631286#define TAMP_SECRETDEVICE_ERASE_ENABLE TAMP_SECRETDEVICE_ERASE_ALL
1264- #endif /* STM32H5 || STM32WBA */
1287+ #endif /* STM32H5 || STM32WBA || STM32H7RS */
12651288
12661289#if defined(STM32F7 )
12671290#define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK
@@ -1599,6 +1622,8 @@ extern "C" {
15991622#define ETH_MAC_SMALL_FIFO_RW_ACTIVE 0x00000006U /* MAC small FIFO read / write controllers active */
16001623#define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE 0x00000001U /* MAC MII receive protocol engine active */
16011624
1625+ #define ETH_TxPacketConfig ETH_TxPacketConfigTypeDef /* Transmit Packet Configuration structure definition */
1626+
16021627/**
16031628 * @}
16041629 */
@@ -1809,7 +1834,7 @@ extern "C" {
18091834#define HAL_FMPI2CEx_AnalogFilter_Config HAL_FMPI2CEx_ConfigAnalogFilter
18101835#define HAL_FMPI2CEx_DigitalFilter_Config HAL_FMPI2CEx_ConfigDigitalFilter
18111836
1812- #define HAL_I2CFastModePlusConfig (SYSCFG_I2CFastModePlus , cmd ) ((cmd == ENABLE)? \
1837+ #define HAL_I2CFastModePlusConfig (SYSCFG_I2CFastModePlus , cmd ) ((( cmd) == ENABLE)? \
18131838 HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): \
18141839 HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
18151840
@@ -1991,12 +2016,12 @@ extern "C" {
19912016/** @defgroup HAL_RTC_Aliased_Functions HAL RTC Aliased Functions maintained for legacy purpose
19922017 * @{
19932018 */
1994- #if defined(STM32H5 ) || defined(STM32WBA )
2019+ #if defined(STM32H5 ) || defined(STM32WBA ) || defined( STM32H7RS )
19952020#define HAL_RTCEx_SetBoothardwareKey HAL_RTCEx_LockBootHardwareKey
19962021#define HAL_RTCEx_BKUPBlock_Enable HAL_RTCEx_BKUPBlock
19972022#define HAL_RTCEx_BKUPBlock_Disable HAL_RTCEx_BKUPUnblock
19982023#define HAL_RTCEx_Erase_SecretDev_Conf HAL_RTCEx_ConfigEraseDeviceSecrets
1999- #endif /* STM32H5 || STM32WBA */
2024+ #endif /* STM32H5 || STM32WBA || STM32H7RS */
20002025
20012026/**
20022027 * @}
@@ -2311,8 +2336,8 @@ extern "C" {
23112336#define __HAL_COMP_EXTI_CLEAR_FLAG (__FLAG__ ) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
23122337 ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
23132338 __HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
2314- # endif
2315- # if defined(STM32F302xE ) || defined(STM32F302xC )
2339+ #endif
2340+ #if defined(STM32F302xE ) || defined(STM32F302xC )
23162341#define __HAL_COMP_EXTI_RISING_IT_ENABLE (__EXTILINE__ ) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
23172342 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
23182343 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
@@ -2345,8 +2370,8 @@ extern "C" {
23452370 ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
23462371 ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
23472372 __HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
2348- # endif
2349- # if defined(STM32F303xE ) || defined(STM32F398xx ) || defined(STM32F303xC ) || defined(STM32F358xx )
2373+ #endif
2374+ #if defined(STM32F303xE ) || defined(STM32F398xx ) || defined(STM32F303xC ) || defined(STM32F358xx )
23502375#define __HAL_COMP_EXTI_RISING_IT_ENABLE (__EXTILINE__ ) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
23512376 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
23522377 ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() : \
@@ -2403,8 +2428,8 @@ extern "C" {
24032428 ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() : \
24042429 ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : \
24052430 __HAL_COMP_COMP7_EXTI_CLEAR_FLAG())
2406- # endif
2407- # if defined(STM32F373xC ) || defined(STM32F378xx )
2431+ #endif
2432+ #if defined(STM32F373xC ) || defined(STM32F378xx )
24082433#define __HAL_COMP_EXTI_RISING_IT_ENABLE (__EXTILINE__ ) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
24092434 __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
24102435#define __HAL_COMP_EXTI_RISING_IT_DISABLE (__EXTILINE__ ) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
@@ -2421,7 +2446,7 @@ extern "C" {
24212446 __HAL_COMP_COMP2_EXTI_GET_FLAG())
24222447#define __HAL_COMP_EXTI_CLEAR_FLAG (__FLAG__ ) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
24232448 __HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
2424- # endif
2449+ #endif
24252450#else
24262451#define __HAL_COMP_EXTI_RISING_IT_ENABLE (__EXTILINE__ ) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
24272452 __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
@@ -2723,6 +2748,12 @@ extern "C" {
27232748#define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET
27242749#define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET
27252750#define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET
2751+ #if defined(STM32C0 )
2752+ #define __HAL_RCC_APB1_FORCE_RESET __HAL_RCC_APB1_GRP1_FORCE_RESET
2753+ #define __HAL_RCC_APB1_RELEASE_RESET __HAL_RCC_APB1_GRP1_RELEASE_RESET
2754+ #define __HAL_RCC_APB2_FORCE_RESET __HAL_RCC_APB1_GRP2_FORCE_RESET
2755+ #define __HAL_RCC_APB2_RELEASE_RESET __HAL_RCC_APB1_GRP2_RELEASE_RESET
2756+ #endif /* STM32C0 */
27262757#define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE
27272758#define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE
27282759#define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET
@@ -3646,8 +3677,12 @@ extern "C" {
36463677#define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK
36473678#define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2
36483679
3680+ #if defined(STM32U0 )
3681+ #define RCC_SYSCLKSOURCE_STATUS_PLLR RCC_SYSCLKSOURCE_STATUS_PLLCLK
3682+ #endif
3683+
36493684#if defined(STM32L4 ) || defined(STM32WB ) || defined(STM32G0 ) || defined(STM32G4 ) || defined(STM32L5 ) || \
3650- defined(STM32WL ) || defined(STM32C0 )
3685+ defined(STM32WL ) || defined(STM32C0 ) || defined( STM32H7RS ) || defined( STM32U0 )
36513686#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
36523687#else
36533688#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
@@ -3749,8 +3784,10 @@ extern "C" {
37493784#define __HAL_RCC_GET_DFSDM_SOURCE __HAL_RCC_GET_DFSDM1_SOURCE
37503785#define RCC_DFSDM1CLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK2
37513786#define RCC_SWPMI1CLKSOURCE_PCLK RCC_SWPMI1CLKSOURCE_PCLK1
3787+ #if !defined(STM32U0 )
37523788#define RCC_LPTIM1CLKSOURCE_PCLK RCC_LPTIM1CLKSOURCE_PCLK1
37533789#define RCC_LPTIM2CLKSOURCE_PCLK RCC_LPTIM2CLKSOURCE_PCLK1
3790+ #endif
37543791
37553792#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM1AUDIOCLKSOURCE_I2S1
37563793#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM1AUDIOCLKSOURCE_I2S2
@@ -3894,9 +3931,9 @@ extern "C" {
38943931/** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
38953932 * @{
38963933 */
3897- #if defined (STM32G0 ) || defined (STM32L5 ) || defined (STM32L412xx ) || defined (STM32L422xx ) || \
3898- defined (STM32L4P5xx ) || defined (STM32L4Q5xx ) || defined (STM32G4 ) || defined (STM32WL ) || defined (STM32U5 ) || \
3899- defined (STM32WBA ) || defined (STM32H5 ) || defined (STM32C0 )
3934+ #if defined (STM32G0 ) || defined (STM32L5 ) || defined (STM32L412xx ) || defined (STM32L422xx ) || defined ( STM32L4P5xx ) || \
3935+ defined (STM32L4Q5xx ) || defined (STM32G4 ) || defined (STM32WL ) || defined (STM32U5 ) || defined (STM32WBA ) || \
3936+ defined (STM32H5 ) || defined (STM32C0 ) || defined (STM32H7RS ) || defined ( STM32U0 )
39003937#else
39013938#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
39023939#endif
@@ -3932,7 +3969,9 @@ extern "C" {
39323969#endif /* STM32F1 */
39333970
39343971#if defined (STM32F0 ) || defined (STM32F2 ) || defined (STM32F3 ) || defined (STM32F4 ) || defined (STM32F7 ) || \
3935- defined (STM32L0 ) || defined (STM32L1 )
3972+ defined (STM32H7 ) || \
3973+ defined (STM32L0 ) || defined (STM32L1 ) || \
3974+ defined (STM32WB )
39363975#define __HAL_RTC_TAMPER_GET_IT __HAL_RTC_TAMPER_GET_FLAG
39373976#endif
39383977
@@ -4217,6 +4256,9 @@ extern "C" {
42174256#define __HAL_TIM_GetCompare __HAL_TIM_GET_COMPARE
42184257
42194258#define TIM_BREAKINPUTSOURCE_DFSDM TIM_BREAKINPUTSOURCE_DFSDM1
4259+
4260+ #define TIM_OCMODE_ASSYMETRIC_PWM1 TIM_OCMODE_ASYMMETRIC_PWM1
4261+ #define TIM_OCMODE_ASSYMETRIC_PWM2 TIM_OCMODE_ASYMMETRIC_PWM2
42204262/**
42214263 * @}
42224264 */
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