diff --git a/README.md b/README.md
index 0e29549f14..cfcbec4872 100644
--- a/README.md
+++ b/README.md
@@ -139,6 +139,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
 | :green_heart:  | STM32F103RB | [Nucleo F103RB](http://www.st.com/en/evaluation-tools/nucleo-f103rb.html) | *0.2.0* |  |
 | :green_heart:  | STM32F302R8 | [Nucleo F302R8](http://www.st.com/en/evaluation-tools/nucleo-f302r8.html) | *1.1.0* |  |
 | :green_heart:  | STM32F303RE | [Nucleo F303RE](http://www.st.com/en/evaluation-tools/nucleo-f303re.html) | *0.1.0* |  |
+| :yellow_heart: | STM32F334R8 | [Nucleo-F334R8](https://www.st.com/en/evaluation-tools/nucleo-f334r8.html) | **2.12.0** |  |
 | :green_heart:  | STM32F401RE | [Nucleo F401RE](http://www.st.com/en/evaluation-tools/nucleo-f401re.html) | *0.2.1* |  |
 | :green_heart:  | STM32F410RB | [Nucleo F410RB](http://www.st.com/en/evaluation-tools/nucleo-f410rb.html) | *2.11.0* |  |
 | :green_heart:  | STM32F411RE | [Nucleo F411RE](http://www.st.com/en/evaluation-tools/nucleo-f411re.html) | *0.2.1* |  |
diff --git a/boards.txt b/boards.txt
index 465241ad49..3d40c56814 100644
--- a/boards.txt
+++ b/boards.txt
@@ -601,6 +601,21 @@ Nucleo_64.menu.pnum.NUCLEO_F303RE.build.variant=STM32F3xx/F303R(D-E)T
 Nucleo_64.menu.pnum.NUCLEO_F303RE.openocd.target=stm32f3x
 Nucleo_64.menu.pnum.NUCLEO_F303RE.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F3xx/STM32F303.svd
 
+# NUCLEO_F334R8 board
+Nucleo_64.menu.pnum.NUCLEO_F334R8=Nucleo F334R8
+Nucleo_64.menu.pnum.NUCLEO_F334R8.node=NODE_F334R8
+Nucleo_64.menu.pnum.NUCLEO_F334R8.upload.maximum_size=65536
+Nucleo_64.menu.pnum.NUCLEO_F334R8.upload.maximum_data_size=12288
+Nucleo_64.menu.pnum.NUCLEO_F334R8.build.mcu=cortex-m4
+Nucleo_64.menu.pnum.NUCLEO_F334R8.build.fpu=-mfpu=fpv4-sp-d16
+Nucleo_64.menu.pnum.NUCLEO_F334R8.build.float-abi=-mfloat-abi=hard
+Nucleo_64.menu.pnum.NUCLEO_F334R8.build.board=NUCLEO_F334R8
+Nucleo_64.menu.pnum.NUCLEO_F334R8.build.series=STM32F3xx
+Nucleo_64.menu.pnum.NUCLEO_F334R8.build.product_line=STM32F334x8
+Nucleo_64.menu.pnum.NUCLEO_F334R8.build.variant=STM32F3xx/F303R(6-8)T_F334R(6-8)T
+Nucleo_64.menu.pnum.NUCLEO_F334R8.openocd.target=stm32f3x
+Nucleo_64.menu.pnum.NUCLEO_F334R8.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32F3xx/STM32F334.svd
+
 # NUCLEO_F401RE board
 Nucleo_64.menu.pnum.NUCLEO_F401RE=Nucleo F401RE
 Nucleo_64.menu.pnum.NUCLEO_F401RE.node="NODE_F401RE,NUCLEO"
diff --git a/cmake/boards_db.cmake b/cmake/boards_db.cmake
index 33a7a8a3cd..da2276e944 100644
--- a/cmake/boards_db.cmake
+++ b/cmake/boards_db.cmake
@@ -7628,6 +7628,286 @@ target_compile_options(GENERIC_C031F6PX_usb_none INTERFACE
   "SHELL:"
 )
 
+# GENERIC_C051C6TX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_C051C6TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32C0xx/C051C(6-8)(T-U)")
+set(GENERIC_C051C6TX_MAXSIZE 32768)
+set(GENERIC_C051C6TX_MAXDATASIZE 12288)
+set(GENERIC_C051C6TX_MCU cortex-m0plus)
+set(GENERIC_C051C6TX_FPCONF "-")
+add_library(GENERIC_C051C6TX INTERFACE)
+target_compile_options(GENERIC_C051C6TX INTERFACE
+  "SHELL:-DSTM32C051xx -D__CORTEX_SC=0"
+  "SHELL:"
+  "SHELL:"
+  "SHELL: "
+  -mcpu=${GENERIC_C051C6TX_MCU}
+)
+target_compile_definitions(GENERIC_C051C6TX INTERFACE
+  "STM32C0xx"
+	"ARDUINO_GENERIC_C051C6TX"
+	"BOARD_NAME=\"GENERIC_C051C6TX\""
+	"BOARD_ID=GENERIC_C051C6TX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_C051C6TX INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32C0xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Source/Templates/gcc/
+  ${GENERIC_C051C6TX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_C051C6TX INTERFACE
+  "LINKER:--default-script=${GENERIC_C051C6TX_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=32768"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=12288"
+  "SHELL: "
+  -mcpu=${GENERIC_C051C6TX_MCU}
+)
+
+add_library(GENERIC_C051C6TX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_C051C6TX_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_C051C6TX_serial_generic INTERFACE)
+target_compile_options(GENERIC_C051C6TX_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_C051C6TX_serial_none INTERFACE)
+target_compile_options(GENERIC_C051C6TX_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_C051C6TX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_C051C6TX_usb_CDC INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_C051C6TX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_C051C6TX_usb_CDCgen INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_C051C6TX_usb_HID INTERFACE)
+target_compile_options(GENERIC_C051C6TX_usb_HID INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_C051C6TX_usb_none INTERFACE)
+target_compile_options(GENERIC_C051C6TX_usb_none INTERFACE
+  "SHELL:"
+)
+
+# GENERIC_C051C6UX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_C051C6UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32C0xx/C051C(6-8)(T-U)")
+set(GENERIC_C051C6UX_MAXSIZE 32768)
+set(GENERIC_C051C6UX_MAXDATASIZE 12288)
+set(GENERIC_C051C6UX_MCU cortex-m0plus)
+set(GENERIC_C051C6UX_FPCONF "-")
+add_library(GENERIC_C051C6UX INTERFACE)
+target_compile_options(GENERIC_C051C6UX INTERFACE
+  "SHELL:-DSTM32C051xx -D__CORTEX_SC=0"
+  "SHELL:"
+  "SHELL:"
+  "SHELL: "
+  -mcpu=${GENERIC_C051C6UX_MCU}
+)
+target_compile_definitions(GENERIC_C051C6UX INTERFACE
+  "STM32C0xx"
+	"ARDUINO_GENERIC_C051C6UX"
+	"BOARD_NAME=\"GENERIC_C051C6UX\""
+	"BOARD_ID=GENERIC_C051C6UX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_C051C6UX INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32C0xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Source/Templates/gcc/
+  ${GENERIC_C051C6UX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_C051C6UX INTERFACE
+  "LINKER:--default-script=${GENERIC_C051C6UX_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=32768"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=12288"
+  "SHELL: "
+  -mcpu=${GENERIC_C051C6UX_MCU}
+)
+
+add_library(GENERIC_C051C6UX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_C051C6UX_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_C051C6UX_serial_generic INTERFACE)
+target_compile_options(GENERIC_C051C6UX_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_C051C6UX_serial_none INTERFACE)
+target_compile_options(GENERIC_C051C6UX_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_C051C6UX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_C051C6UX_usb_CDC INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_C051C6UX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_C051C6UX_usb_CDCgen INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_C051C6UX_usb_HID INTERFACE)
+target_compile_options(GENERIC_C051C6UX_usb_HID INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_C051C6UX_usb_none INTERFACE)
+target_compile_options(GENERIC_C051C6UX_usb_none INTERFACE
+  "SHELL:"
+)
+
+# GENERIC_C051C8TX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_C051C8TX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32C0xx/C051C(6-8)(T-U)")
+set(GENERIC_C051C8TX_MAXSIZE 65536)
+set(GENERIC_C051C8TX_MAXDATASIZE 12288)
+set(GENERIC_C051C8TX_MCU cortex-m0plus)
+set(GENERIC_C051C8TX_FPCONF "-")
+add_library(GENERIC_C051C8TX INTERFACE)
+target_compile_options(GENERIC_C051C8TX INTERFACE
+  "SHELL:-DSTM32C051xx -D__CORTEX_SC=0"
+  "SHELL:"
+  "SHELL:"
+  "SHELL: "
+  -mcpu=${GENERIC_C051C8TX_MCU}
+)
+target_compile_definitions(GENERIC_C051C8TX INTERFACE
+  "STM32C0xx"
+	"ARDUINO_GENERIC_C051C8TX"
+	"BOARD_NAME=\"GENERIC_C051C8TX\""
+	"BOARD_ID=GENERIC_C051C8TX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_C051C8TX INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32C0xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Source/Templates/gcc/
+  ${GENERIC_C051C8TX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_C051C8TX INTERFACE
+  "LINKER:--default-script=${GENERIC_C051C8TX_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=65536"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=12288"
+  "SHELL: "
+  -mcpu=${GENERIC_C051C8TX_MCU}
+)
+
+add_library(GENERIC_C051C8TX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_C051C8TX_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_C051C8TX_serial_generic INTERFACE)
+target_compile_options(GENERIC_C051C8TX_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_C051C8TX_serial_none INTERFACE)
+target_compile_options(GENERIC_C051C8TX_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_C051C8TX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_C051C8TX_usb_CDC INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_C051C8TX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_C051C8TX_usb_CDCgen INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_C051C8TX_usb_HID INTERFACE)
+target_compile_options(GENERIC_C051C8TX_usb_HID INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_C051C8TX_usb_none INTERFACE)
+target_compile_options(GENERIC_C051C8TX_usb_none INTERFACE
+  "SHELL:"
+)
+
+# GENERIC_C051C8UX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_C051C8UX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32C0xx/C051C(6-8)(T-U)")
+set(GENERIC_C051C8UX_MAXSIZE 65536)
+set(GENERIC_C051C8UX_MAXDATASIZE 12288)
+set(GENERIC_C051C8UX_MCU cortex-m0plus)
+set(GENERIC_C051C8UX_FPCONF "-")
+add_library(GENERIC_C051C8UX INTERFACE)
+target_compile_options(GENERIC_C051C8UX INTERFACE
+  "SHELL:-DSTM32C051xx -D__CORTEX_SC=0"
+  "SHELL:"
+  "SHELL:"
+  "SHELL: "
+  -mcpu=${GENERIC_C051C8UX_MCU}
+)
+target_compile_definitions(GENERIC_C051C8UX INTERFACE
+  "STM32C0xx"
+	"ARDUINO_GENERIC_C051C8UX"
+	"BOARD_NAME=\"GENERIC_C051C8UX\""
+	"BOARD_ID=GENERIC_C051C8UX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_C051C8UX INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32C0xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32C0xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32C0xx/Source/Templates/gcc/
+  ${GENERIC_C051C8UX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_C051C8UX INTERFACE
+  "LINKER:--default-script=${GENERIC_C051C8UX_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=65536"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=12288"
+  "SHELL: "
+  -mcpu=${GENERIC_C051C8UX_MCU}
+)
+
+add_library(GENERIC_C051C8UX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_C051C8UX_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_C051C8UX_serial_generic INTERFACE)
+target_compile_options(GENERIC_C051C8UX_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_C051C8UX_serial_none INTERFACE)
+target_compile_options(GENERIC_C051C8UX_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_C051C8UX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_C051C8UX_usb_CDC INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_C051C8UX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_C051C8UX_usb_CDCgen INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_C051C8UX_usb_HID INTERFACE)
+target_compile_options(GENERIC_C051C8UX_usb_HID INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_C051C8UX_usb_none INTERFACE)
+target_compile_options(GENERIC_C051C8UX_usb_none INTERFACE
+  "SHELL:"
+)
+
 # GENERIC_C071G8UX
 # -----------------------------------------------------------------------------
 
@@ -74515,7 +74795,7 @@ target_compile_options(GENERIC_G484VETX_xusb_HSFS INTERFACE
 
 set(GENERIC_G491CCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491C(C-E)T_G4A1CET")
 set(GENERIC_G491CCTX_MAXSIZE 262144)
-set(GENERIC_G491CCTX_MAXDATASIZE 131072)
+set(GENERIC_G491CCTX_MAXDATASIZE 114688)
 set(GENERIC_G491CCTX_MCU cortex-m4)
 set(GENERIC_G491CCTX_FPCONF "-")
 add_library(GENERIC_G491CCTX INTERFACE)
@@ -74546,7 +74826,7 @@ target_link_options(GENERIC_G491CCTX INTERFACE
   "LINKER:--default-script=${GENERIC_G491CCTX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=262144"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G491CCTX_MCU}
 )
@@ -74597,7 +74877,7 @@ target_compile_options(GENERIC_G491CCTX_xusb_HSFS INTERFACE
 
 set(GENERIC_G491CETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491C(C-E)T_G4A1CET")
 set(GENERIC_G491CETX_MAXSIZE 524288)
-set(GENERIC_G491CETX_MAXDATASIZE 131072)
+set(GENERIC_G491CETX_MAXDATASIZE 114688)
 set(GENERIC_G491CETX_MCU cortex-m4)
 set(GENERIC_G491CETX_FPCONF "-")
 add_library(GENERIC_G491CETX INTERFACE)
@@ -74628,7 +74908,7 @@ target_link_options(GENERIC_G491CETX INTERFACE
   "LINKER:--default-script=${GENERIC_G491CETX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G491CETX_MCU}
 )
@@ -74679,7 +74959,7 @@ target_compile_options(GENERIC_G491CETX_xusb_HSFS INTERFACE
 
 set(GENERIC_G491KCUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491K(C-E)U_G4A1KEU")
 set(GENERIC_G491KCUX_MAXSIZE 262144)
-set(GENERIC_G491KCUX_MAXDATASIZE 131072)
+set(GENERIC_G491KCUX_MAXDATASIZE 114688)
 set(GENERIC_G491KCUX_MCU cortex-m4)
 set(GENERIC_G491KCUX_FPCONF "-")
 add_library(GENERIC_G491KCUX INTERFACE)
@@ -74710,7 +74990,7 @@ target_link_options(GENERIC_G491KCUX INTERFACE
   "LINKER:--default-script=${GENERIC_G491KCUX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=262144"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G491KCUX_MCU}
 )
@@ -74761,7 +75041,7 @@ target_compile_options(GENERIC_G491KCUX_xusb_HSFS INTERFACE
 
 set(GENERIC_G491KEUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491K(C-E)U_G4A1KEU")
 set(GENERIC_G491KEUX_MAXSIZE 524288)
-set(GENERIC_G491KEUX_MAXDATASIZE 131072)
+set(GENERIC_G491KEUX_MAXDATASIZE 114688)
 set(GENERIC_G491KEUX_MCU cortex-m4)
 set(GENERIC_G491KEUX_FPCONF "-")
 add_library(GENERIC_G491KEUX INTERFACE)
@@ -74792,7 +75072,7 @@ target_link_options(GENERIC_G491KEUX INTERFACE
   "LINKER:--default-script=${GENERIC_G491KEUX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G491KEUX_MCU}
 )
@@ -74843,7 +75123,7 @@ target_compile_options(GENERIC_G491KEUX_xusb_HSFS INTERFACE
 
 set(GENERIC_G491MCSX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491M(C-E)(S-T)_G4A1ME(S-T)")
 set(GENERIC_G491MCSX_MAXSIZE 262144)
-set(GENERIC_G491MCSX_MAXDATASIZE 131072)
+set(GENERIC_G491MCSX_MAXDATASIZE 114688)
 set(GENERIC_G491MCSX_MCU cortex-m4)
 set(GENERIC_G491MCSX_FPCONF "-")
 add_library(GENERIC_G491MCSX INTERFACE)
@@ -74874,7 +75154,7 @@ target_link_options(GENERIC_G491MCSX INTERFACE
   "LINKER:--default-script=${GENERIC_G491MCSX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=262144"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G491MCSX_MCU}
 )
@@ -74925,7 +75205,7 @@ target_compile_options(GENERIC_G491MCSX_xusb_HSFS INTERFACE
 
 set(GENERIC_G491MCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491M(C-E)(S-T)_G4A1ME(S-T)")
 set(GENERIC_G491MCTX_MAXSIZE 262144)
-set(GENERIC_G491MCTX_MAXDATASIZE 131072)
+set(GENERIC_G491MCTX_MAXDATASIZE 114688)
 set(GENERIC_G491MCTX_MCU cortex-m4)
 set(GENERIC_G491MCTX_FPCONF "-")
 add_library(GENERIC_G491MCTX INTERFACE)
@@ -74956,7 +75236,7 @@ target_link_options(GENERIC_G491MCTX INTERFACE
   "LINKER:--default-script=${GENERIC_G491MCTX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=262144"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G491MCTX_MCU}
 )
@@ -75007,7 +75287,7 @@ target_compile_options(GENERIC_G491MCTX_xusb_HSFS INTERFACE
 
 set(GENERIC_G491MESX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491M(C-E)(S-T)_G4A1ME(S-T)")
 set(GENERIC_G491MESX_MAXSIZE 524288)
-set(GENERIC_G491MESX_MAXDATASIZE 131072)
+set(GENERIC_G491MESX_MAXDATASIZE 114688)
 set(GENERIC_G491MESX_MCU cortex-m4)
 set(GENERIC_G491MESX_FPCONF "-")
 add_library(GENERIC_G491MESX INTERFACE)
@@ -75038,7 +75318,7 @@ target_link_options(GENERIC_G491MESX INTERFACE
   "LINKER:--default-script=${GENERIC_G491MESX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G491MESX_MCU}
 )
@@ -75089,7 +75369,7 @@ target_compile_options(GENERIC_G491MESX_xusb_HSFS INTERFACE
 
 set(GENERIC_G491METX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491M(C-E)(S-T)_G4A1ME(S-T)")
 set(GENERIC_G491METX_MAXSIZE 524288)
-set(GENERIC_G491METX_MAXDATASIZE 131072)
+set(GENERIC_G491METX_MAXDATASIZE 114688)
 set(GENERIC_G491METX_MCU cortex-m4)
 set(GENERIC_G491METX_FPCONF "-")
 add_library(GENERIC_G491METX INTERFACE)
@@ -75120,7 +75400,7 @@ target_link_options(GENERIC_G491METX INTERFACE
   "LINKER:--default-script=${GENERIC_G491METX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G491METX_MCU}
 )
@@ -75171,7 +75451,7 @@ target_compile_options(GENERIC_G491METX_xusb_HSFS INTERFACE
 
 set(GENERIC_G491RCIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)x(Z)_G4A1RE(I-T-Y)")
 set(GENERIC_G491RCIX_MAXSIZE 262144)
-set(GENERIC_G491RCIX_MAXDATASIZE 131072)
+set(GENERIC_G491RCIX_MAXDATASIZE 114688)
 set(GENERIC_G491RCIX_MCU cortex-m4)
 set(GENERIC_G491RCIX_FPCONF "-")
 add_library(GENERIC_G491RCIX INTERFACE)
@@ -75202,7 +75482,7 @@ target_link_options(GENERIC_G491RCIX INTERFACE
   "LINKER:--default-script=${GENERIC_G491RCIX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=262144"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G491RCIX_MCU}
 )
@@ -75253,7 +75533,7 @@ target_compile_options(GENERIC_G491RCIX_xusb_HSFS INTERFACE
 
 set(GENERIC_G491RCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)x(Z)_G4A1RE(I-T-Y)")
 set(GENERIC_G491RCTX_MAXSIZE 262144)
-set(GENERIC_G491RCTX_MAXDATASIZE 131072)
+set(GENERIC_G491RCTX_MAXDATASIZE 114688)
 set(GENERIC_G491RCTX_MCU cortex-m4)
 set(GENERIC_G491RCTX_FPCONF "-")
 add_library(GENERIC_G491RCTX INTERFACE)
@@ -75284,7 +75564,7 @@ target_link_options(GENERIC_G491RCTX INTERFACE
   "LINKER:--default-script=${GENERIC_G491RCTX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=262144"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G491RCTX_MCU}
 )
@@ -75335,7 +75615,7 @@ target_compile_options(GENERIC_G491RCTX_xusb_HSFS INTERFACE
 
 set(GENERIC_G491REIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)x(Z)_G4A1RE(I-T-Y)")
 set(GENERIC_G491REIX_MAXSIZE 524288)
-set(GENERIC_G491REIX_MAXDATASIZE 131072)
+set(GENERIC_G491REIX_MAXDATASIZE 114688)
 set(GENERIC_G491REIX_MCU cortex-m4)
 set(GENERIC_G491REIX_FPCONF "-")
 add_library(GENERIC_G491REIX INTERFACE)
@@ -75366,7 +75646,7 @@ target_link_options(GENERIC_G491REIX INTERFACE
   "LINKER:--default-script=${GENERIC_G491REIX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G491REIX_MCU}
 )
@@ -75417,7 +75697,7 @@ target_compile_options(GENERIC_G491REIX_xusb_HSFS INTERFACE
 
 set(GENERIC_G491RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)x(Z)_G4A1RE(I-T-Y)")
 set(GENERIC_G491RETX_MAXSIZE 524288)
-set(GENERIC_G491RETX_MAXDATASIZE 131072)
+set(GENERIC_G491RETX_MAXDATASIZE 114688)
 set(GENERIC_G491RETX_MCU cortex-m4)
 set(GENERIC_G491RETX_FPCONF "-")
 add_library(GENERIC_G491RETX INTERFACE)
@@ -75448,7 +75728,7 @@ target_link_options(GENERIC_G491RETX INTERFACE
   "LINKER:--default-script=${GENERIC_G491RETX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G491RETX_MCU}
 )
@@ -75499,7 +75779,7 @@ target_compile_options(GENERIC_G491RETX_xusb_HSFS INTERFACE
 
 set(GENERIC_G491RETXZ_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)x(Z)_G4A1RE(I-T-Y)")
 set(GENERIC_G491RETXZ_MAXSIZE 524288)
-set(GENERIC_G491RETXZ_MAXDATASIZE 131072)
+set(GENERIC_G491RETXZ_MAXDATASIZE 114688)
 set(GENERIC_G491RETXZ_MCU cortex-m4)
 set(GENERIC_G491RETXZ_FPCONF "-")
 add_library(GENERIC_G491RETXZ INTERFACE)
@@ -75530,7 +75810,7 @@ target_link_options(GENERIC_G491RETXZ INTERFACE
   "LINKER:--default-script=${GENERIC_G491RETXZ_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G491RETXZ_MCU}
 )
@@ -75581,7 +75861,7 @@ target_compile_options(GENERIC_G491RETXZ_xusb_HSFS INTERFACE
 
 set(GENERIC_G491REYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)x(Z)_G4A1RE(I-T-Y)")
 set(GENERIC_G491REYX_MAXSIZE 524288)
-set(GENERIC_G491REYX_MAXDATASIZE 131072)
+set(GENERIC_G491REYX_MAXDATASIZE 114688)
 set(GENERIC_G491REYX_MCU cortex-m4)
 set(GENERIC_G491REYX_FPCONF "-")
 add_library(GENERIC_G491REYX INTERFACE)
@@ -75612,7 +75892,7 @@ target_link_options(GENERIC_G491REYX INTERFACE
   "LINKER:--default-script=${GENERIC_G491REYX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G491REYX_MCU}
 )
@@ -75663,7 +75943,7 @@ target_compile_options(GENERIC_G491REYX_xusb_HSFS INTERFACE
 
 set(GENERIC_G491VCTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491V(C-E)T_G4A1VET")
 set(GENERIC_G491VCTX_MAXSIZE 262144)
-set(GENERIC_G491VCTX_MAXDATASIZE 131072)
+set(GENERIC_G491VCTX_MAXDATASIZE 114688)
 set(GENERIC_G491VCTX_MCU cortex-m4)
 set(GENERIC_G491VCTX_FPCONF "-")
 add_library(GENERIC_G491VCTX INTERFACE)
@@ -75694,7 +75974,7 @@ target_link_options(GENERIC_G491VCTX INTERFACE
   "LINKER:--default-script=${GENERIC_G491VCTX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=262144"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G491VCTX_MCU}
 )
@@ -75745,7 +76025,7 @@ target_compile_options(GENERIC_G491VCTX_xusb_HSFS INTERFACE
 
 set(GENERIC_G491VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491V(C-E)T_G4A1VET")
 set(GENERIC_G491VETX_MAXSIZE 524288)
-set(GENERIC_G491VETX_MAXDATASIZE 131072)
+set(GENERIC_G491VETX_MAXDATASIZE 114688)
 set(GENERIC_G491VETX_MCU cortex-m4)
 set(GENERIC_G491VETX_FPCONF "-")
 add_library(GENERIC_G491VETX INTERFACE)
@@ -75776,7 +76056,7 @@ target_link_options(GENERIC_G491VETX INTERFACE
   "LINKER:--default-script=${GENERIC_G491VETX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G491VETX_MCU}
 )
@@ -75827,7 +76107,7 @@ target_compile_options(GENERIC_G491VETX_xusb_HSFS INTERFACE
 
 set(GENERIC_G4A1CETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491C(C-E)T_G4A1CET")
 set(GENERIC_G4A1CETX_MAXSIZE 524288)
-set(GENERIC_G4A1CETX_MAXDATASIZE 131072)
+set(GENERIC_G4A1CETX_MAXDATASIZE 114688)
 set(GENERIC_G4A1CETX_MCU cortex-m4)
 set(GENERIC_G4A1CETX_FPCONF "-")
 add_library(GENERIC_G4A1CETX INTERFACE)
@@ -75858,7 +76138,7 @@ target_link_options(GENERIC_G4A1CETX INTERFACE
   "LINKER:--default-script=${GENERIC_G4A1CETX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G4A1CETX_MCU}
 )
@@ -75909,7 +76189,7 @@ target_compile_options(GENERIC_G4A1CETX_xusb_HSFS INTERFACE
 
 set(GENERIC_G4A1KEUX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491K(C-E)U_G4A1KEU")
 set(GENERIC_G4A1KEUX_MAXSIZE 524288)
-set(GENERIC_G4A1KEUX_MAXDATASIZE 131072)
+set(GENERIC_G4A1KEUX_MAXDATASIZE 114688)
 set(GENERIC_G4A1KEUX_MCU cortex-m4)
 set(GENERIC_G4A1KEUX_FPCONF "-")
 add_library(GENERIC_G4A1KEUX INTERFACE)
@@ -75940,7 +76220,7 @@ target_link_options(GENERIC_G4A1KEUX INTERFACE
   "LINKER:--default-script=${GENERIC_G4A1KEUX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G4A1KEUX_MCU}
 )
@@ -75991,7 +76271,7 @@ target_compile_options(GENERIC_G4A1KEUX_xusb_HSFS INTERFACE
 
 set(GENERIC_G4A1MESX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491M(C-E)(S-T)_G4A1ME(S-T)")
 set(GENERIC_G4A1MESX_MAXSIZE 524288)
-set(GENERIC_G4A1MESX_MAXDATASIZE 131072)
+set(GENERIC_G4A1MESX_MAXDATASIZE 114688)
 set(GENERIC_G4A1MESX_MCU cortex-m4)
 set(GENERIC_G4A1MESX_FPCONF "-")
 add_library(GENERIC_G4A1MESX INTERFACE)
@@ -76022,7 +76302,7 @@ target_link_options(GENERIC_G4A1MESX INTERFACE
   "LINKER:--default-script=${GENERIC_G4A1MESX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G4A1MESX_MCU}
 )
@@ -76073,7 +76353,7 @@ target_compile_options(GENERIC_G4A1MESX_xusb_HSFS INTERFACE
 
 set(GENERIC_G4A1METX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491M(C-E)(S-T)_G4A1ME(S-T)")
 set(GENERIC_G4A1METX_MAXSIZE 524288)
-set(GENERIC_G4A1METX_MAXDATASIZE 131072)
+set(GENERIC_G4A1METX_MAXDATASIZE 114688)
 set(GENERIC_G4A1METX_MCU cortex-m4)
 set(GENERIC_G4A1METX_FPCONF "-")
 add_library(GENERIC_G4A1METX INTERFACE)
@@ -76104,7 +76384,7 @@ target_link_options(GENERIC_G4A1METX INTERFACE
   "LINKER:--default-script=${GENERIC_G4A1METX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G4A1METX_MCU}
 )
@@ -76155,7 +76435,7 @@ target_compile_options(GENERIC_G4A1METX_xusb_HSFS INTERFACE
 
 set(GENERIC_G4A1REIX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)x(Z)_G4A1RE(I-T-Y)")
 set(GENERIC_G4A1REIX_MAXSIZE 524288)
-set(GENERIC_G4A1REIX_MAXDATASIZE 131072)
+set(GENERIC_G4A1REIX_MAXDATASIZE 114688)
 set(GENERIC_G4A1REIX_MCU cortex-m4)
 set(GENERIC_G4A1REIX_FPCONF "-")
 add_library(GENERIC_G4A1REIX INTERFACE)
@@ -76186,7 +76466,7 @@ target_link_options(GENERIC_G4A1REIX INTERFACE
   "LINKER:--default-script=${GENERIC_G4A1REIX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G4A1REIX_MCU}
 )
@@ -76237,7 +76517,7 @@ target_compile_options(GENERIC_G4A1REIX_xusb_HSFS INTERFACE
 
 set(GENERIC_G4A1RETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)x(Z)_G4A1RE(I-T-Y)")
 set(GENERIC_G4A1RETX_MAXSIZE 524288)
-set(GENERIC_G4A1RETX_MAXDATASIZE 131072)
+set(GENERIC_G4A1RETX_MAXDATASIZE 114688)
 set(GENERIC_G4A1RETX_MCU cortex-m4)
 set(GENERIC_G4A1RETX_FPCONF "-")
 add_library(GENERIC_G4A1RETX INTERFACE)
@@ -76268,7 +76548,7 @@ target_link_options(GENERIC_G4A1RETX INTERFACE
   "LINKER:--default-script=${GENERIC_G4A1RETX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G4A1RETX_MCU}
 )
@@ -76319,7 +76599,7 @@ target_compile_options(GENERIC_G4A1RETX_xusb_HSFS INTERFACE
 
 set(GENERIC_G4A1REYX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491RC(I-T)_G491RE(I-T-Y)x(Z)_G4A1RE(I-T-Y)")
 set(GENERIC_G4A1REYX_MAXSIZE 524288)
-set(GENERIC_G4A1REYX_MAXDATASIZE 131072)
+set(GENERIC_G4A1REYX_MAXDATASIZE 114688)
 set(GENERIC_G4A1REYX_MCU cortex-m4)
 set(GENERIC_G4A1REYX_FPCONF "-")
 add_library(GENERIC_G4A1REYX INTERFACE)
@@ -76350,7 +76630,7 @@ target_link_options(GENERIC_G4A1REYX INTERFACE
   "LINKER:--default-script=${GENERIC_G4A1REYX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G4A1REYX_MCU}
 )
@@ -76401,7 +76681,7 @@ target_compile_options(GENERIC_G4A1REYX_xusb_HSFS INTERFACE
 
 set(GENERIC_G4A1VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32G4xx/G491V(C-E)T_G4A1VET")
 set(GENERIC_G4A1VETX_MAXSIZE 524288)
-set(GENERIC_G4A1VETX_MAXDATASIZE 131072)
+set(GENERIC_G4A1VETX_MAXDATASIZE 114688)
 set(GENERIC_G4A1VETX_MCU cortex-m4)
 set(GENERIC_G4A1VETX_FPCONF "-")
 add_library(GENERIC_G4A1VETX INTERFACE)
@@ -76432,7 +76712,7 @@ target_link_options(GENERIC_G4A1VETX INTERFACE
   "LINKER:--default-script=${GENERIC_G4A1VETX_VARIANT_PATH}/ldscript.ld"
   "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
 	"LINKER:--defsym=LD_MAX_SIZE=524288"
-	"LINKER:--defsym=LD_MAX_DATA_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=114688"
   "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
   -mcpu=${GENERIC_G4A1VETX_MCU}
 )
@@ -77626,6 +77906,334 @@ target_compile_options(GENERIC_H573ZITX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
+# GENERIC_H723VEHX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_H723VEHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)")
+set(GENERIC_H723VEHX_MAXSIZE 524288)
+set(GENERIC_H723VEHX_MAXDATASIZE 528384)
+set(GENERIC_H723VEHX_MCU cortex-m7)
+set(GENERIC_H723VEHX_FPCONF "-")
+add_library(GENERIC_H723VEHX INTERFACE)
+target_compile_options(GENERIC_H723VEHX INTERFACE
+  "SHELL:-DCORE_CM7 -DSTM32H723xx"
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_H723VEHX_MCU}
+)
+target_compile_definitions(GENERIC_H723VEHX INTERFACE
+  "STM32H7xx"
+	"ARDUINO_GENERIC_H723VEHX"
+	"BOARD_NAME=\"GENERIC_H723VEHX\""
+	"BOARD_ID=GENERIC_H723VEHX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_H723VEHX INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/
+  ${GENERIC_H723VEHX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_H723VEHX INTERFACE
+  "LINKER:--default-script=${GENERIC_H723VEHX_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=528384"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_H723VEHX_MCU}
+)
+
+add_library(GENERIC_H723VEHX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_H723VEHX_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H723VEHX_serial_generic INTERFACE)
+target_compile_options(GENERIC_H723VEHX_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_H723VEHX_serial_none INTERFACE)
+target_compile_options(GENERIC_H723VEHX_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_H723VEHX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_H723VEHX_usb_CDC INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_H723VEHX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_H723VEHX_usb_CDCgen INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_H723VEHX_usb_HID INTERFACE)
+target_compile_options(GENERIC_H723VEHX_usb_HID INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_H723VEHX_usb_none INTERFACE)
+target_compile_options(GENERIC_H723VEHX_usb_none INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H723VEHX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_H723VEHX_xusb_FS INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H723VEHX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_H723VEHX_xusb_HS INTERFACE
+  "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_H723VEHX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_H723VEHX_xusb_HSFS INTERFACE
+  "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
+# GENERIC_H723VETX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_H723VETX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)")
+set(GENERIC_H723VETX_MAXSIZE 524288)
+set(GENERIC_H723VETX_MAXDATASIZE 528384)
+set(GENERIC_H723VETX_MCU cortex-m7)
+set(GENERIC_H723VETX_FPCONF "-")
+add_library(GENERIC_H723VETX INTERFACE)
+target_compile_options(GENERIC_H723VETX INTERFACE
+  "SHELL:-DCORE_CM7 -DSTM32H723xx"
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_H723VETX_MCU}
+)
+target_compile_definitions(GENERIC_H723VETX INTERFACE
+  "STM32H7xx"
+	"ARDUINO_GENERIC_H723VETX"
+	"BOARD_NAME=\"GENERIC_H723VETX\""
+	"BOARD_ID=GENERIC_H723VETX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_H723VETX INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/
+  ${GENERIC_H723VETX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_H723VETX INTERFACE
+  "LINKER:--default-script=${GENERIC_H723VETX_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=524288"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=528384"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_H723VETX_MCU}
+)
+
+add_library(GENERIC_H723VETX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_H723VETX_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H723VETX_serial_generic INTERFACE)
+target_compile_options(GENERIC_H723VETX_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_H723VETX_serial_none INTERFACE)
+target_compile_options(GENERIC_H723VETX_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_H723VETX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_H723VETX_usb_CDC INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_H723VETX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_H723VETX_usb_CDCgen INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_H723VETX_usb_HID INTERFACE)
+target_compile_options(GENERIC_H723VETX_usb_HID INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_H723VETX_usb_none INTERFACE)
+target_compile_options(GENERIC_H723VETX_usb_none INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H723VETX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_H723VETX_xusb_FS INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H723VETX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_H723VETX_xusb_HS INTERFACE
+  "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_H723VETX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_H723VETX_xusb_HSFS INTERFACE
+  "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
+# GENERIC_H723VGHX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_H723VGHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)")
+set(GENERIC_H723VGHX_MAXSIZE 1048576)
+set(GENERIC_H723VGHX_MAXDATASIZE 528384)
+set(GENERIC_H723VGHX_MCU cortex-m7)
+set(GENERIC_H723VGHX_FPCONF "-")
+add_library(GENERIC_H723VGHX INTERFACE)
+target_compile_options(GENERIC_H723VGHX INTERFACE
+  "SHELL:-DCORE_CM7 -DSTM32H723xx"
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_H723VGHX_MCU}
+)
+target_compile_definitions(GENERIC_H723VGHX INTERFACE
+  "STM32H7xx"
+	"ARDUINO_GENERIC_H723VGHX"
+	"BOARD_NAME=\"GENERIC_H723VGHX\""
+	"BOARD_ID=GENERIC_H723VGHX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_H723VGHX INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/
+  ${GENERIC_H723VGHX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_H723VGHX INTERFACE
+  "LINKER:--default-script=${GENERIC_H723VGHX_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=1048576"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=528384"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_H723VGHX_MCU}
+)
+
+add_library(GENERIC_H723VGHX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_H723VGHX_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H723VGHX_serial_generic INTERFACE)
+target_compile_options(GENERIC_H723VGHX_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_H723VGHX_serial_none INTERFACE)
+target_compile_options(GENERIC_H723VGHX_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_H723VGHX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_H723VGHX_usb_CDC INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_H723VGHX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_H723VGHX_usb_CDCgen INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_H723VGHX_usb_HID INTERFACE)
+target_compile_options(GENERIC_H723VGHX_usb_HID INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_H723VGHX_usb_none INTERFACE)
+target_compile_options(GENERIC_H723VGHX_usb_none INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H723VGHX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_H723VGHX_xusb_FS INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H723VGHX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_H723VGHX_xusb_HS INTERFACE
+  "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_H723VGHX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_H723VGHX_xusb_HSFS INTERFACE
+  "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
+# GENERIC_H723VGTX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_H723VGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)")
+set(GENERIC_H723VGTX_MAXSIZE 1048576)
+set(GENERIC_H723VGTX_MAXDATASIZE 528384)
+set(GENERIC_H723VGTX_MCU cortex-m7)
+set(GENERIC_H723VGTX_FPCONF "-")
+add_library(GENERIC_H723VGTX INTERFACE)
+target_compile_options(GENERIC_H723VGTX INTERFACE
+  "SHELL:-DCORE_CM7 -DSTM32H723xx"
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_H723VGTX_MCU}
+)
+target_compile_definitions(GENERIC_H723VGTX INTERFACE
+  "STM32H7xx"
+	"ARDUINO_GENERIC_H723VGTX"
+	"BOARD_NAME=\"GENERIC_H723VGTX\""
+	"BOARD_ID=GENERIC_H723VGTX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_H723VGTX INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/
+  ${GENERIC_H723VGTX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_H723VGTX INTERFACE
+  "LINKER:--default-script=${GENERIC_H723VGTX_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=1048576"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=528384"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_H723VGTX_MCU}
+)
+
+add_library(GENERIC_H723VGTX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_H723VGTX_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H723VGTX_serial_generic INTERFACE)
+target_compile_options(GENERIC_H723VGTX_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_H723VGTX_serial_none INTERFACE)
+target_compile_options(GENERIC_H723VGTX_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_H723VGTX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_H723VGTX_usb_CDC INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_H723VGTX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_H723VGTX_usb_CDCgen INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_H723VGTX_usb_HID INTERFACE)
+target_compile_options(GENERIC_H723VGTX_usb_HID INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_H723VGTX_usb_none INTERFACE)
+target_compile_options(GENERIC_H723VGTX_usb_none INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H723VGTX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_H723VGTX_xusb_FS INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H723VGTX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_H723VGTX_xusb_HS INTERFACE
+  "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_H723VGTX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_H723VGTX_xusb_HSFS INTERFACE
+  "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
 # GENERIC_H723ZETX
 # -----------------------------------------------------------------------------
 
@@ -77790,6 +78398,170 @@ target_compile_options(GENERIC_H723ZGTX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
+# GENERIC_H730VBHX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_H730VBHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)")
+set(GENERIC_H730VBHX_MAXSIZE 131072)
+set(GENERIC_H730VBHX_MAXDATASIZE 528384)
+set(GENERIC_H730VBHX_MCU cortex-m7)
+set(GENERIC_H730VBHX_FPCONF "-")
+add_library(GENERIC_H730VBHX INTERFACE)
+target_compile_options(GENERIC_H730VBHX INTERFACE
+  "SHELL:-DCORE_CM7 -DSTM32H730xx"
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_H730VBHX_MCU}
+)
+target_compile_definitions(GENERIC_H730VBHX INTERFACE
+  "STM32H7xx"
+	"ARDUINO_GENERIC_H730VBHX"
+	"BOARD_NAME=\"GENERIC_H730VBHX\""
+	"BOARD_ID=GENERIC_H730VBHX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_H730VBHX INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/
+  ${GENERIC_H730VBHX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_H730VBHX INTERFACE
+  "LINKER:--default-script=${GENERIC_H730VBHX_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=528384"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_H730VBHX_MCU}
+)
+
+add_library(GENERIC_H730VBHX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_H730VBHX_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H730VBHX_serial_generic INTERFACE)
+target_compile_options(GENERIC_H730VBHX_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_H730VBHX_serial_none INTERFACE)
+target_compile_options(GENERIC_H730VBHX_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_H730VBHX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_H730VBHX_usb_CDC INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_H730VBHX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_H730VBHX_usb_CDCgen INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_H730VBHX_usb_HID INTERFACE)
+target_compile_options(GENERIC_H730VBHX_usb_HID INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_H730VBHX_usb_none INTERFACE)
+target_compile_options(GENERIC_H730VBHX_usb_none INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H730VBHX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_H730VBHX_xusb_FS INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H730VBHX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_H730VBHX_xusb_HS INTERFACE
+  "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_H730VBHX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_H730VBHX_xusb_HSFS INTERFACE
+  "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
+# GENERIC_H730VBTX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_H730VBTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)")
+set(GENERIC_H730VBTX_MAXSIZE 131072)
+set(GENERIC_H730VBTX_MAXDATASIZE 528384)
+set(GENERIC_H730VBTX_MCU cortex-m7)
+set(GENERIC_H730VBTX_FPCONF "-")
+add_library(GENERIC_H730VBTX INTERFACE)
+target_compile_options(GENERIC_H730VBTX INTERFACE
+  "SHELL:-DCORE_CM7 -DSTM32H730xx"
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_H730VBTX_MCU}
+)
+target_compile_definitions(GENERIC_H730VBTX INTERFACE
+  "STM32H7xx"
+	"ARDUINO_GENERIC_H730VBTX"
+	"BOARD_NAME=\"GENERIC_H730VBTX\""
+	"BOARD_ID=GENERIC_H730VBTX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_H730VBTX INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/
+  ${GENERIC_H730VBTX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_H730VBTX INTERFACE
+  "LINKER:--default-script=${GENERIC_H730VBTX_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=131072"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=528384"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_H730VBTX_MCU}
+)
+
+add_library(GENERIC_H730VBTX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_H730VBTX_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H730VBTX_serial_generic INTERFACE)
+target_compile_options(GENERIC_H730VBTX_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_H730VBTX_serial_none INTERFACE)
+target_compile_options(GENERIC_H730VBTX_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_H730VBTX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_H730VBTX_usb_CDC INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_H730VBTX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_H730VBTX_usb_CDCgen INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_H730VBTX_usb_HID INTERFACE)
+target_compile_options(GENERIC_H730VBTX_usb_HID INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_H730VBTX_usb_none INTERFACE)
+target_compile_options(GENERIC_H730VBTX_usb_none INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H730VBTX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_H730VBTX_xusb_FS INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H730VBTX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_H730VBTX_xusb_HS INTERFACE
+  "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_H730VBTX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_H730VBTX_xusb_HSFS INTERFACE
+  "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
 # GENERIC_H730ZBTX
 # -----------------------------------------------------------------------------
 
@@ -77872,6 +78644,170 @@ target_compile_options(GENERIC_H730ZBTX_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
+# GENERIC_H733VGHX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_H733VGHX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)")
+set(GENERIC_H733VGHX_MAXSIZE 1048576)
+set(GENERIC_H733VGHX_MAXDATASIZE 528384)
+set(GENERIC_H733VGHX_MCU cortex-m7)
+set(GENERIC_H733VGHX_FPCONF "-")
+add_library(GENERIC_H733VGHX INTERFACE)
+target_compile_options(GENERIC_H733VGHX INTERFACE
+  "SHELL:-DCORE_CM7 -DSTM32H733xx"
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_H733VGHX_MCU}
+)
+target_compile_definitions(GENERIC_H733VGHX INTERFACE
+  "STM32H7xx"
+	"ARDUINO_GENERIC_H733VGHX"
+	"BOARD_NAME=\"GENERIC_H733VGHX\""
+	"BOARD_ID=GENERIC_H733VGHX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_H733VGHX INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/
+  ${GENERIC_H733VGHX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_H733VGHX INTERFACE
+  "LINKER:--default-script=${GENERIC_H733VGHX_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=1048576"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=528384"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_H733VGHX_MCU}
+)
+
+add_library(GENERIC_H733VGHX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_H733VGHX_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H733VGHX_serial_generic INTERFACE)
+target_compile_options(GENERIC_H733VGHX_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_H733VGHX_serial_none INTERFACE)
+target_compile_options(GENERIC_H733VGHX_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_H733VGHX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_H733VGHX_usb_CDC INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_H733VGHX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_H733VGHX_usb_CDCgen INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_H733VGHX_usb_HID INTERFACE)
+target_compile_options(GENERIC_H733VGHX_usb_HID INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_H733VGHX_usb_none INTERFACE)
+target_compile_options(GENERIC_H733VGHX_usb_none INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H733VGHX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_H733VGHX_xusb_FS INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H733VGHX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_H733VGHX_xusb_HS INTERFACE
+  "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_H733VGHX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_H733VGHX_xusb_HSFS INTERFACE
+  "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
+# GENERIC_H733VGTX
+# -----------------------------------------------------------------------------
+
+set(GENERIC_H733VGTX_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32H7xx/H723V(E-G)(H-T)_H730VB(H-T)_H733VG(H-T)")
+set(GENERIC_H733VGTX_MAXSIZE 1048576)
+set(GENERIC_H733VGTX_MAXDATASIZE 528384)
+set(GENERIC_H733VGTX_MCU cortex-m7)
+set(GENERIC_H733VGTX_FPCONF "-")
+add_library(GENERIC_H733VGTX INTERFACE)
+target_compile_options(GENERIC_H733VGTX INTERFACE
+  "SHELL:-DCORE_CM7 -DSTM32H733xx"
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_H733VGTX_MCU}
+)
+target_compile_definitions(GENERIC_H733VGTX INTERFACE
+  "STM32H7xx"
+	"ARDUINO_GENERIC_H733VGTX"
+	"BOARD_NAME=\"GENERIC_H733VGTX\""
+	"BOARD_ID=GENERIC_H733VGTX"
+	"VARIANT_H=\"variant_generic.h\""
+)
+target_include_directories(GENERIC_H733VGTX INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32H7xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32H7xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32H7xx/Source/Templates/gcc/
+  ${GENERIC_H733VGTX_VARIANT_PATH}
+)
+
+target_link_options(GENERIC_H733VGTX INTERFACE
+  "LINKER:--default-script=${GENERIC_H733VGTX_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=1048576"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=528384"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${GENERIC_H733VGTX_MCU}
+)
+
+add_library(GENERIC_H733VGTX_serial_disabled INTERFACE)
+target_compile_options(GENERIC_H733VGTX_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H733VGTX_serial_generic INTERFACE)
+target_compile_options(GENERIC_H733VGTX_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(GENERIC_H733VGTX_serial_none INTERFACE)
+target_compile_options(GENERIC_H733VGTX_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(GENERIC_H733VGTX_usb_CDC INTERFACE)
+target_compile_options(GENERIC_H733VGTX_usb_CDC INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(GENERIC_H733VGTX_usb_CDCgen INTERFACE)
+target_compile_options(GENERIC_H733VGTX_usb_CDCgen INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(GENERIC_H733VGTX_usb_HID INTERFACE)
+target_compile_options(GENERIC_H733VGTX_usb_HID INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(GENERIC_H733VGTX_usb_none INTERFACE)
+target_compile_options(GENERIC_H733VGTX_usb_none INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H733VGTX_xusb_FS INTERFACE)
+target_compile_options(GENERIC_H733VGTX_xusb_FS INTERFACE
+  "SHELL:"
+)
+add_library(GENERIC_H733VGTX_xusb_HS INTERFACE)
+target_compile_options(GENERIC_H733VGTX_xusb_HS INTERFACE
+  "SHELL:-DUSE_USB_HS"
+)
+add_library(GENERIC_H733VGTX_xusb_HSFS INTERFACE)
+target_compile_options(GENERIC_H733VGTX_xusb_HSFS INTERFACE
+  "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
 # GENERIC_H733ZGTX
 # -----------------------------------------------------------------------------
 
@@ -109888,6 +110824,88 @@ target_compile_options(NUCLEO_F303RE_xusb_HSFS INTERFACE
   "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
 )
 
+# NUCLEO_F334R8
+# -----------------------------------------------------------------------------
+
+set(NUCLEO_F334R8_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32F3xx/F303R(6-8)T_F334R(6-8)T")
+set(NUCLEO_F334R8_MAXSIZE 65536)
+set(NUCLEO_F334R8_MAXDATASIZE 12288)
+set(NUCLEO_F334R8_MCU cortex-m4)
+set(NUCLEO_F334R8_FPCONF "fpv4-sp-d16-hard")
+add_library(NUCLEO_F334R8 INTERFACE)
+target_compile_options(NUCLEO_F334R8 INTERFACE
+  "SHELL:-DSTM32F334x8"
+  "SHELL:"
+  "SHELL:"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${NUCLEO_F334R8_MCU}
+)
+target_compile_definitions(NUCLEO_F334R8 INTERFACE
+  "STM32F3xx"
+	"ARDUINO_NUCLEO_F334R8"
+	"BOARD_NAME=\"NUCLEO_F334R8\""
+	"BOARD_ID=NUCLEO_F334R8"
+	"VARIANT_H=\"variant_NUCLEO_F334R8.h\""
+)
+target_include_directories(NUCLEO_F334R8 INTERFACE
+  ${CMAKE_CURRENT_LIST_DIR}/../system/STM32F3xx
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Inc
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32F3xx_HAL_Driver/Src
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Include/
+  ${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32F3xx/Source/Templates/gcc/
+  ${NUCLEO_F334R8_VARIANT_PATH}
+)
+
+target_link_options(NUCLEO_F334R8 INTERFACE
+  "LINKER:--default-script=${NUCLEO_F334R8_VARIANT_PATH}/ldscript.ld"
+  "LINKER:--defsym=LD_FLASH_OFFSET=0x0"
+	"LINKER:--defsym=LD_MAX_SIZE=65536"
+	"LINKER:--defsym=LD_MAX_DATA_SIZE=12288"
+  "SHELL:-mfpu=fpv4-sp-d16 -mfloat-abi=hard"
+  -mcpu=${NUCLEO_F334R8_MCU}
+)
+
+add_library(NUCLEO_F334R8_serial_disabled INTERFACE)
+target_compile_options(NUCLEO_F334R8_serial_disabled INTERFACE
+  "SHELL:"
+)
+add_library(NUCLEO_F334R8_serial_generic INTERFACE)
+target_compile_options(NUCLEO_F334R8_serial_generic INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED"
+)
+add_library(NUCLEO_F334R8_serial_none INTERFACE)
+target_compile_options(NUCLEO_F334R8_serial_none INTERFACE
+  "SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
+)
+add_library(NUCLEO_F334R8_usb_CDC INTERFACE)
+target_compile_options(NUCLEO_F334R8_usb_CDC INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
+)
+add_library(NUCLEO_F334R8_usb_CDCgen INTERFACE)
+target_compile_options(NUCLEO_F334R8_usb_CDCgen INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
+)
+add_library(NUCLEO_F334R8_usb_HID INTERFACE)
+target_compile_options(NUCLEO_F334R8_usb_HID INTERFACE
+  "SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
+)
+add_library(NUCLEO_F334R8_usb_none INTERFACE)
+target_compile_options(NUCLEO_F334R8_usb_none INTERFACE
+  "SHELL:"
+)
+add_library(NUCLEO_F334R8_xusb_FS INTERFACE)
+target_compile_options(NUCLEO_F334R8_xusb_FS INTERFACE
+  "SHELL:"
+)
+add_library(NUCLEO_F334R8_xusb_HS INTERFACE)
+target_compile_options(NUCLEO_F334R8_xusb_HS INTERFACE
+  "SHELL:-DUSE_USB_HS"
+)
+add_library(NUCLEO_F334R8_xusb_HSFS INTERFACE)
+target_compile_options(NUCLEO_F334R8_xusb_HSFS INTERFACE
+  "SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
+)
+
 # NUCLEO_F401RE
 # -----------------------------------------------------------------------------
 
diff --git a/variants/STM32F3xx/F303R(6-8)T_F334R(6-8)T/CMakeLists.txt b/variants/STM32F3xx/F303R(6-8)T_F334R(6-8)T/CMakeLists.txt
index 2a4d55b6b1..b6af055a8e 100644
--- a/variants/STM32F3xx/F303R(6-8)T_F334R(6-8)T/CMakeLists.txt
+++ b/variants/STM32F3xx/F303R(6-8)T_F334R(6-8)T/CMakeLists.txt
@@ -22,6 +22,7 @@ add_library(variant_bin STATIC EXCLUDE_FROM_ALL
   generic_clock.c
   PeripheralPins.c
   variant_generic.cpp
+  variant_NUCLEO_F334R8.cpp
 )
 target_link_libraries(variant_bin PUBLIC variant_usage)
 
diff --git a/variants/STM32F3xx/F303R(6-8)T_F334R(6-8)T/variant_NUCLEO_F334R8.cpp b/variants/STM32F3xx/F303R(6-8)T_F334R(6-8)T/variant_NUCLEO_F334R8.cpp
new file mode 100644
index 0000000000..e25a0757ad
--- /dev/null
+++ b/variants/STM32F3xx/F303R(6-8)T_F334R(6-8)T/variant_NUCLEO_F334R8.cpp
@@ -0,0 +1,156 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2025, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                        opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#if defined(ARDUINO_NUCLEO_F334R8)
+#include "pins_arduino.h"
+
+// Pin number
+const PinName digitalPin[] = {
+  PA_3,  //D0/A19
+  PA_2,  //D1/A20
+  PA_10, //D2
+  PB_3,  //D3
+  PB_5,  //D4
+  PB_4,  //D5
+  PB_10, //D6
+  PA_8,  //D7
+  PA_9,  //D8
+  PC_7,  //D9
+  PB_6,  //D10
+  PA_7,  //D11/A16
+  PA_6,  //D12/A17
+  PA_5,  //D13/A18
+  PB_9,  //D14
+  PB_8,  //D15
+  // ST Morpho
+  // CN7 Left Side
+  PC_10, //D16
+  PC_12, //D17
+  NC,    //D18 - BOOT0
+  PA_13, //D19
+  PA_14, //D20
+  PA_15, //D21
+  PB_7,  //D22
+  PC_13, //D23
+  PC_14, //D24
+  PC_15, //D25
+  PF_0,  //D26
+  PF_1,  //D27
+  PC_2,  //D28/A6
+  PC_3,  //D29/A7
+  // CN7 Right Side
+  PC_11, //D30
+  PD_2,  //D31
+  // CN10 Left Side
+  PC_9,  //D32
+  // CN10 Right side
+  PC_8,  //D33
+  PC_6,  //D34
+  PC_5,  //D35/A8
+  PA_12, //D36
+  PA_11, //D37
+  PB_12, //D38/A9
+  PB_11, //D39
+  PB_2,  //D40/A10
+  PB_1,  //D41/A11
+  PB_15, //D42/A12
+  PB_14, //D43/A13
+  PB_13, //D44/A14
+  PC_4,  //D45/A15
+  PA_0,  //D46/A0
+  PA_1,  //D47/A1
+  PA_4,  //D48/A2
+  PB_0,  //D49/A3
+  PC_1,  //D50/A4
+  PC_0   //D51/A5
+};
+
+// Analog (Ax) pin number array
+const uint32_t analogInputPin[] = {
+  46, //A0
+  47, //A1
+  48, //A2
+  49, //A3
+  50, //A4
+  51, //A5
+  28, //A6
+  29, //A7
+  35, //A8
+  38, //A9
+  40, //A10
+  41, //A11
+  42, //A12
+  43, //A13
+  44,  //A13
+  45,  //A15
+  11, //A16
+  12, //A17
+  13, //A18
+  0, //A19
+  1, //A20
+};
+
+// ----------------------------------------------------------------------------
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+  * @brief  System Clock Configuration
+  * @param  None
+  * @retval None
+  */
+WEAK void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
+  RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
+    Error_Handler();
+  }
+  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_I2C1;
+  PeriphClkInit.I2c1ClockSelection = RCC_I2C1CLKSOURCE_SYSCLK;
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
+    Error_Handler();
+  }
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ARDUINO_NUCLEO_F303RE */
diff --git a/variants/STM32F3xx/F303R(6-8)T_F334R(6-8)T/variant_NUCLEO_F334R8.h b/variants/STM32F3xx/F303R(6-8)T_F334R(6-8)T/variant_NUCLEO_F334R8.h
new file mode 100644
index 0000000000..5c2e52fa43
--- /dev/null
+++ b/variants/STM32F3xx/F303R(6-8)T_F334R(6-8)T/variant_NUCLEO_F334R8.h
@@ -0,0 +1,175 @@
+/*
+ *******************************************************************************
+ * Copyright (c) 2025, STMicroelectronics
+ * All rights reserved.
+ *
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                        opensource.org/licenses/BSD-3-Clause
+ *
+ *******************************************************************************
+ */
+#pragma once
+
+/*----------------------------------------------------------------------------
+ *        STM32 pins number
+ *----------------------------------------------------------------------------*/
+
+// Right Side
+//  CN9
+#define PA3                     PIN_A19
+#define PA2                     PIN_A20
+#define PA10                    2
+#define PB3                     3
+#define PB5                     4
+#define PB4                     5
+#define PB10                    6
+#define PA8                     7
+//  CN5
+#define PA9                     8
+#define PC7                     9
+#define PB6                     10
+#define PA7                     PIN_A16
+#define PA6                     PIN_A17
+#define PA5                     PIN_A18
+#define PB9                     14
+#define PB8                     15
+// Left Side
+//  ST Morpho
+//    CN7 Left Side
+#define PC10                    16
+#define PC12                    17
+//18 // BOOT0 NC NC
+#define PA13                    19
+#define PA14                    20
+#define PA15                    21
+#define PB7                     22
+#define PC13                    23
+#define PC14                    24
+#define PC15                    25
+#define PF0                     26
+#define PF1                     27
+#define PC2                     PIN_A6
+#define PC3                     PIN_A7
+//    CN7 Right Side
+#define PC11                    30
+#define PD2                     31
+//    CN10 Left Side
+#define PC9                     32
+//    CN10 Right side
+#define PC8                     33
+#define PC6                     34
+#define PC5                     PIN_A8
+#define PA12                    36
+#define PA11                    37
+#define PB12                    PIN_A9
+#define PB11                    39
+#define PB2                     PIN_A10
+#define PB1                     PIN_A11
+#define PB15                    PIN_A12
+#define PB14                    PIN_A13
+#define PB13                    PIN_A14
+#define PC4                     PIN_A15
+
+#define PA0                     PIN_A0
+#define PA1                     PIN_A1
+#define PA4                     PIN_A2
+#define PB0                     PIN_A3
+#define PC1                     PIN_A4
+#define PC0                     PIN_A5
+
+
+// Alternate pins number
+#define PA1_ALT1                (PA1  | ALT1)
+#define PA2_ALT1                (PA2  | ALT1)
+#define PA3_ALT1                (PA3  | ALT1)
+#define PA6_ALT1                (PA6  | ALT1)
+#define PA7_ALT1                (PA7  | ALT1)
+#define PA7_ALT2                (PA7  | ALT2)
+#define PA9_ALT1                (PA9  | ALT1)
+#define PA10_ALT1               (PA10 | ALT1)
+#define PA11_ALT1               (PA11 | ALT1)
+#define PA12_ALT1               (PA12 | ALT1)
+#define PB0_ALT1                (PB0  | ALT1)
+#define PB1_ALT1                (PB1  | ALT1)
+#define PB4_ALT1                (PB4  | ALT1)
+#define PB5_ALT1                (PB5  | ALT1)
+#define PB7_ALT1                (PB7  | ALT1)
+#define PB14_ALT1               (PB14 | ALT1)
+#define PB15_ALT1               (PB15 | ALT1)
+#define PB15_ALT2               (PB15 | ALT2)
+#define PC0_ALT1                (PC0  | ALT1)
+#define PC1_ALT1                (PC1  | ALT1)
+#define PC2_ALT1                (PC2  | ALT1)
+#define PC3_ALT1                (PC3  | ALT1)
+
+#define NUM_DIGITAL_PINS        52
+#define NUM_ANALOG_INPUTS       21
+
+// On-board LED pin number
+#ifndef LED_BUILTIN
+  #define LED_BUILTIN           LED_GREEN
+#endif
+#define LED_GREEN               PA5
+
+// On-board user button
+#ifndef USER_BTN
+  #define USER_BTN              PC13
+#endif
+
+// Timer Definitions
+// Use TIM6/TIM7 when possible as servo and tone don't need GPIO output pin
+#ifndef TIMER_TONE
+  #define TIMER_TONE            TIM6
+#endif
+#ifndef TIMER_SERVO
+  #define TIMER_SERVO           TIM7
+#endif
+
+// UART Definitions
+#ifndef SERIAL_UART_INSTANCE
+  #define SERIAL_UART_INSTANCE  2 //Connected to ST-Link
+#endif
+
+// Default pin used for 'Serial' instance (ex: ST-Link)
+// Mandatory for Firmata
+#ifndef PIN_SERIAL_RX
+  #define PIN_SERIAL_RX         PA3
+#endif
+#ifndef PIN_SERIAL_TX
+  #define PIN_SERIAL_TX         PA2
+#endif
+
+/* Extra HAL modules */
+#if !defined(HAL_DAC_MODULE_DISABLED)
+  #define HAL_DAC_MODULE_ENABLED
+#endif
+
+/*----------------------------------------------------------------------------
+ *        Arduino objects - C++ only
+ *----------------------------------------------------------------------------*/
+
+#ifdef __cplusplus
+  // These serial port names are intended to allow libraries and architecture-neutral
+  // sketches to automatically default to the correct port name for a particular type
+  // of use.  For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
+  // the first hardware serial port whose RX/TX pins are not dedicated to another use.
+  //
+  // SERIAL_PORT_MONITOR        Port which normally prints to the Arduino Serial Monitor
+  //
+  // SERIAL_PORT_USBVIRTUAL     Port which is USB virtual serial
+  //
+  // SERIAL_PORT_LINUXBRIDGE    Port which connects to a Linux system via Bridge library
+  //
+  // SERIAL_PORT_HARDWARE       Hardware serial port, physical RX & TX pins.
+  //
+  // SERIAL_PORT_HARDWARE_OPEN  Hardware serial ports which are open for use.  Their RX & TX
+  //                            pins are NOT connected to anything by default.
+  #ifndef SERIAL_PORT_MONITOR
+    #define SERIAL_PORT_MONITOR   Serial
+  #endif
+  #ifndef SERIAL_PORT_HARDWARE
+    #define SERIAL_PORT_HARDWARE  Serial
+  #endif
+#endif