Merge pull request #7 from Marcondiro/master

Fix windows, fmt, more #[derive(Debug)], Bump to 0.2.0

Author: Marcondiro

Cargo.toml

@@ -1,15 +1,13 @@
 [package]
 name = "libipt"
-version = "0.2.0-rc.1"
+version = "0.2.0"
 authors = ["sum_catnip <catnip@catnip.fyi>", "Marcondiro"]
 edition = "2021"
 license = "MIT"
 description = "The Intel Processor Trace (Intel PT) Decoder Library is Intel's reference implementation for decoding Intel PT."
 repository = "https://github.com/sum-catnip/libipt-rs"
 
-# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
-
 [dependencies]
-libipt-sys = "0.2.0-rc.1"
+libipt-sys = "0.2.0"
 bitflags = "2.4.1"
 num_enum = "0.7.1"

src/asid.rs

@@ -87,30 +87,44 @@ impl Asid {
     /// The CR3 value.
     #[inline]
     pub fn cr3(self) -> Option<u64> {
-        match self.0.cr3 { NO_CR3 => None, x => Some(x) }
+        match self.0.cr3 {
+            NO_CR3 => None,
+            x => Some(x),
+        }
     }
 
     /// The CR3 value.
     #[inline]
-    pub fn set_cr3(&mut self, cr3: u64) { self.0.cr3 = cr3 }
+    pub fn set_cr3(&mut self, cr3: u64) {
+        self.0.cr3 = cr3
+    }
 
     /// The VMCS Base address.
     #[inline]
     pub fn vmcs(self) -> Option<u64> {
-        match self.0.vmcs { NO_VMCS => None, x => Some(x) }
+        match self.0.vmcs {
+            NO_VMCS => None,
+            x => Some(x),
+        }
     }
 
     /// The VMCS Base address.
     #[inline]
-    pub fn set_vmcs(&mut self, vmcs: u64) { self.0.vmcs = vmcs }
+    pub fn set_vmcs(&mut self, vmcs: u64) {
+        self.0.vmcs = vmcs
+    }
 }
 
 impl Default for Asid {
-    fn default() -> Self { Asid::new(None, None) }
+    fn default() -> Self {
+        Asid::new(None, None)
+    }
 }
 
 impl From<pt_asid> for Asid {
-    fn from(asid: pt_asid) -> Self { Asid(asid) }
+    fn from(asid: pt_asid) -> Self {
+        Asid(asid)
+    }
 }
 
 impl PartialEq for Asid {

src/block/block.rs

@@ -1,15 +1,12 @@
-use crate::insn::Class;
 use crate::event::ExecModeType;
-use std::convert::TryFrom;
+use crate::insn::Class;
 use libipt_sys::pt_block;
+use std::convert::TryFrom;
 
 #[cfg(test)]
 mod test {
     use super::*;
-    use libipt_sys::{
-        pt_exec_mode_ptem_32bit,
-        pt_insn_class_ptic_error,
-    };
+    use libipt_sys::{pt_exec_mode_ptem_32bit, pt_insn_class_ptic_error};
 
     #[test]
     fn test_block_props() {
@@ -25,18 +22,18 @@ mod test {
             size: 8,
             _bitfield_align_1: [],
             _bitfield_1: pt_block::new_bitfield_1(0, 1),
-            __bindgen_padding_0: Default::default()
-       });
+            __bindgen_padding_0: Default::default(),
+        });
 
-       assert_eq!(blk.ip(), 1);
-       assert_eq!(blk.end_ip(), 2);
-       assert_eq!(blk.isid(), 3);
-       assert_eq!(blk.mode(), ExecModeType::Bit32);
-       assert_eq!(blk.class(), Class::Error);
-       assert_eq!(blk.ninsn(), 4);
-       assert_eq!(blk.raw(), &data[..8]);
-       assert!(blk.truncated());
-       assert!(!blk.speculative());
+        assert_eq!(blk.ip(), 1);
+        assert_eq!(blk.end_ip(), 2);
+        assert_eq!(blk.isid(), 3);
+        assert_eq!(blk.mode(), ExecModeType::Bit32);
+        assert_eq!(blk.class(), Class::Error);
+        assert_eq!(blk.ninsn(), 4);
+        assert_eq!(blk.raw(), &data[..8]);
+        assert!(blk.truncated());
+        assert!(!blk.speculative());
     }
 
     #[test]
@@ -53,46 +50,52 @@ mod test {
             size: 8,
             _bitfield_align_1: [],
             _bitfield_1: pt_block::new_bitfield_1(0, 0),
-            __bindgen_padding_0: Default::default()
-       });
+            __bindgen_padding_0: Default::default(),
+        });
 
-       assert_eq!(blk.ip(), 1);
-       assert_eq!(blk.end_ip(), 2);
-       assert_eq!(blk.isid(), 3);
-       assert_eq!(blk.mode(), ExecModeType::Bit32);
-       assert_eq!(blk.class(), Class::Error);
-       assert_eq!(blk.ninsn(), 4);
-       assert!(blk.raw().len() > 0);
-       assert!(!blk.truncated());
-       assert!(!blk.speculative());
+        assert_eq!(blk.ip(), 1);
+        assert_eq!(blk.end_ip(), 2);
+        assert_eq!(blk.isid(), 3);
+        assert_eq!(blk.mode(), ExecModeType::Bit32);
+        assert_eq!(blk.class(), Class::Error);
+        assert_eq!(blk.ninsn(), 4);
+        assert!(blk.raw().len() > 0);
+        assert!(!blk.truncated());
+        assert!(!blk.speculative());
     }
 }
 
 /// A block of instructions.
 ///
 /// Instructions in this block are executed sequentially but are not necessarily
 /// contiguous in memory.  Users are expected to follow direct branches.
-#[derive(Clone, Copy)]
+#[derive(Debug, Clone, Copy)]
 pub struct Block(pub(super) pt_block);
 impl Block {
     /// The IP of the first instruction in this block.
-    pub fn ip(&self) -> u64 { self.0.ip }
+    pub fn ip(&self) -> u64 {
+        self.0.ip
+    }
 
     /// The IP of the last instruction in this block.
     ///
     /// This can be used for error-detection.
-    pub fn end_ip(&self) -> u64 { self.0.end_ip }
+    pub fn end_ip(&self) -> u64 {
+        self.0.end_ip
+    }
 
     /// The image section that contains the instructions in this block.
     ///
     /// A value of zero means that the section did not have an identifier.
     /// The section was not added via an image section cache or the memory
     /// was read via the read memory callback.
-    pub fn isid(&self) -> i32 { self.0.isid }
+    pub fn isid(&self) -> i32 {
+        self.0.isid
+    }
 
     /// The execution mode for all instructions in this block.
     pub fn mode(&self) -> ExecModeType {
-        ExecModeType::try_from(self.0.mode).unwrap()
+        ExecModeType::try_from(self.0.mode as u32).unwrap()
     }
 
     /// The instruction class for the last instruction in this block.
@@ -101,11 +104,13 @@ impl Block {
     /// class is not available. The block decoder may choose to not provide
     /// the instruction class in some cases for performance reasons.
     pub fn class(&self) -> Class {
-        Class::try_from(self.0.iclass).unwrap()
+        Class::try_from(self.0.iclass as u32).unwrap()
     }
 
     /// The number of instructions in this block.
-    pub fn ninsn(&self) -> u16 { self.0.ninsn }
+    pub fn ninsn(&self) -> u16 {
+        self.0.ninsn
+    }
 
     /// The raw bytes of the last instruction in this block in case the
     /// instruction does not fit entirely into this block's section.
@@ -119,7 +124,9 @@ impl Block {
     /// instructions in this block.
     ///
     /// - all instructions in this block were executed speculatively.
-    pub fn speculative(&self) -> bool { self.0.speculative() > 0 }
+    pub fn speculative(&self) -> bool {
+        self.0.speculative() > 0
+    }
 
     /// A collection of flags giving additional information about the
     /// instructions in this block.
@@ -131,5 +138,7 @@ impl Block {
     ///
     /// The raw bytes for the last instruction are provided in \@raw and
     /// its size in \@size in this case.
-    pub fn truncated(&self) -> bool { self.0.truncated() > 0 }
+    pub fn truncated(&self) -> bool {
+        self.0.truncated() > 0
+    }
 }

src/block/decoder.rs

@@ -58,6 +58,7 @@ mod test {
 /// The decoder needs to be synchronized before it can be used.
 ///
 /// * `T` - The Callback Closure Type in the Config
+#[derive(Debug)]
 pub struct BlockDecoder<'a, T>(&'a mut pt_block_decoder, PhantomData<T>);
 impl<T> BlockDecoder<'_, T> {
     /// Allocate an Intel PT block decoder.

src/block/mod.rs

@@ -2,4 +2,4 @@ mod block;
 mod decoder;
 
 pub use block::*;
-pub use decoder::*;
+pub use decoder::*;