Fix JIT regalloc conflicts in memory load

After reset_reg() clears the register allocator state, load instructions
(lb/lh/lw/lbu/lhu) could reallocate the same host register for both the
address and destination, causing data corruption. This commit uses
map_vm_reg_reserved() to prevent reusing the address register.

Author: jserv

src/rv32_jit.c

@@ -155,8 +155,7 @@ GEN(bgeu, {
 GEN(lb, {
     memory_t *m = PRIV(rv)->mem;
     vm_reg[0] = ra_load(state, ir->rs1);
-    IIF(RV32_HAS(SYSTEM))
-    (
+    IIF(RV32_HAS(SYSTEM))(
         {
             emit_load_imm_sext(state, temp_reg, ir->imm);
             emit_alu32(state, 0x01, vm_reg[0], temp_reg);
@@ -180,7 +179,7 @@ GEN(lb, {
             emit_cmp_imm32(state, temp_reg, 0);
             uint32_t jump_loc_0 = state->offset;
             emit_jcc_offset(state, 0x84);
-            vm_reg[1] = map_vm_reg(state, ir->rd);
+            vm_reg[1] = map_vm_reg_reserved(state, ir->rd, vm_reg[0]);
 
             emit_load(state, S32, parameter_reg[0], vm_reg[1],
                       offsetof(riscv_t, X) + 4 * ir->rd);
@@ -207,8 +206,7 @@ GEN(lb, {
 GEN(lh, {
     memory_t *m = PRIV(rv)->mem;
     vm_reg[0] = ra_load(state, ir->rs1);
-    IIF(RV32_HAS(SYSTEM))
-    (
+    IIF(RV32_HAS(SYSTEM))(
         {
             emit_load_imm_sext(state, temp_reg, ir->imm);
             emit_alu32(state, 0x01, vm_reg[0], temp_reg);
@@ -232,7 +230,7 @@ GEN(lh, {
             emit_cmp_imm32(state, temp_reg, 0);
             uint32_t jump_loc_0 = state->offset;
             emit_jcc_offset(state, 0x84);
-            vm_reg[1] = map_vm_reg(state, ir->rd);
+            vm_reg[1] = map_vm_reg_reserved(state, ir->rd, vm_reg[0]);
 
             emit_load(state, S32, parameter_reg[0], vm_reg[1],
                       offsetof(riscv_t, X) + 4 * ir->rd);
@@ -259,8 +257,7 @@ GEN(lh, {
 GEN(lw, {
     memory_t *m = PRIV(rv)->mem;
     vm_reg[0] = ra_load(state, ir->rs1);
-    IIF(RV32_HAS(SYSTEM))
-    (
+    IIF(RV32_HAS(SYSTEM))(
         {
             emit_load_imm_sext(state, temp_reg, ir->imm);
             emit_alu32(state, 0x01, vm_reg[0], temp_reg);
@@ -284,7 +281,7 @@ GEN(lw, {
             emit_cmp_imm32(state, temp_reg, 0);
             uint32_t jump_loc_0 = state->offset;
             emit_jcc_offset(state, 0x84);
-            vm_reg[1] = map_vm_reg(state, ir->rd);
+            vm_reg[1] = map_vm_reg_reserved(state, ir->rd, vm_reg[0]);
 
             emit_load(state, S32, parameter_reg[0], vm_reg[1],
                       offsetof(riscv_t, X) + 4 * ir->rd);
@@ -311,8 +308,7 @@ GEN(lw, {
 GEN(lbu, {
     memory_t *m = PRIV(rv)->mem;
     vm_reg[0] = ra_load(state, ir->rs1);
-    IIF(RV32_HAS(SYSTEM))
-    (
+    IIF(RV32_HAS(SYSTEM))(
         {
             emit_load_imm_sext(state, temp_reg, ir->imm);
             emit_alu32(state, 0x01, vm_reg[0], temp_reg);
@@ -336,7 +332,7 @@ GEN(lbu, {
             emit_cmp_imm32(state, temp_reg, 0);
             uint32_t jump_loc_0 = state->offset;
             emit_jcc_offset(state, 0x84);
-            vm_reg[1] = map_vm_reg(state, ir->rd);
+            vm_reg[1] = map_vm_reg_reserved(state, ir->rd, vm_reg[0]);
 
             emit_load(state, S32, parameter_reg[0], vm_reg[1],
                       offsetof(riscv_t, X) + 4 * ir->rd);
@@ -363,8 +359,7 @@ GEN(lbu, {
 GEN(lhu, {
     memory_t *m = PRIV(rv)->mem;
     vm_reg[0] = ra_load(state, ir->rs1);
-    IIF(RV32_HAS(SYSTEM))
-    (
+    IIF(RV32_HAS(SYSTEM))(
         {
             emit_load_imm_sext(state, temp_reg, ir->imm);
             emit_alu32(state, 0x01, vm_reg[0], temp_reg);
@@ -388,7 +383,7 @@ GEN(lhu, {
             emit_cmp_imm32(state, temp_reg, 0);
             uint32_t jump_loc_0 = state->offset;
             emit_jcc_offset(state, 0x84);
-            vm_reg[1] = map_vm_reg(state, ir->rd);
+            vm_reg[1] = map_vm_reg_reserved(state, ir->rd, vm_reg[0]);
 
             emit_load(state, S32, parameter_reg[0], vm_reg[1],
                       offsetof(riscv_t, X) + 4 * ir->rd);
@@ -415,8 +410,7 @@ GEN(lhu, {
 GEN(sb, {
     memory_t *m = PRIV(rv)->mem;
     vm_reg[0] = ra_load(state, ir->rs1);
-    IIF(RV32_HAS(SYSTEM))
-    (
+    IIF(RV32_HAS(SYSTEM))(
         {
             emit_load_imm_sext(state, temp_reg, ir->imm);
             emit_alu32(state, 0x01, vm_reg[0], temp_reg);
@@ -465,8 +459,7 @@ GEN(sb, {
 GEN(sh, {
     memory_t *m = PRIV(rv)->mem;
     vm_reg[0] = ra_load(state, ir->rs1);
-    IIF(RV32_HAS(SYSTEM))
-    (
+    IIF(RV32_HAS(SYSTEM))(
         {
             emit_load_imm_sext(state, temp_reg, ir->imm);
             emit_alu32(state, 0x01, vm_reg[0], temp_reg);
@@ -515,8 +508,7 @@ GEN(sh, {
 GEN(sw, {
     memory_t *m = PRIV(rv)->mem;
     vm_reg[0] = ra_load(state, ir->rs1);
-    IIF(RV32_HAS(SYSTEM))
-    (
+    IIF(RV32_HAS(SYSTEM))(
         {
             emit_load_imm_sext(state, temp_reg, ir->imm);
             emit_alu32(state, 0x01, vm_reg[0], temp_reg);