@@ -1791,6 +1791,50 @@ static inline bool op_cfsw(rv_insn_t *ir, const uint32_t insn)
17911791#define op_cflwsp OP_UNIMP
17921792#endif /* RV32_HAS(EXT_C) && RV32_HAS(EXT_F) */
17931793
1794+ /* OP: RVV
1795+ * opcode is 0x57
1796+ * 31 26 25 24 20 19 15 14 12 11 7 6 0
1797+ * | funct6 |vm| vs2 | vs1 | funct3 | vd | opcode |
1798+ * refer https://blog.csdn.net/weixin_40198519/article/details/126662069
1799+ */
1800+ static inline bool op_v (rv_insn_t * ir , const uint32_t insn )
1801+ {
1802+ uint32_t funct3_mask = 0x7000 ;
1803+ switch (insn & funct3_mask ) {
1804+ case 0 :
1805+ return op_ivv (ir , insn );
1806+ break ;
1807+ case 1 :
1808+ return op_fvv (ir , insn );
1809+ break ;
1810+ case 2 :
1811+ return op_mvv (ir , insn );
1812+ break ;
1813+ case 3 :
1814+ return op_ivi (ir , insn );
1815+ break ;
1816+ case 4 :
1817+ return op_ivx (ir , insn );
1818+ break ;
1819+ case 5 :
1820+ return op_fvf (ir , insn );
1821+ break ;
1822+ case 6 :
1823+ return op_mvx (ir , insn );
1824+ break ;
1825+ default :
1826+ }
1827+
1828+ }
1829+
1830+ static inline bool op_ivv (rv_insn_t * ir , const uint32_t insn ) {}
1831+ static inline bool op_fvv (rv_insn_t * ir , const uint32_t insn ) {}
1832+ static inline bool op_mvv (rv_insn_t * ir , const uint32_t insn ) {}
1833+ static inline bool op_ivi (rv_insn_t * ir , const uint32_t insn ) {}
1834+ static inline bool op_ivx (rv_insn_t * ir , const uint32_t insn ) {}
1835+ static inline bool op_fvf (rv_insn_t * ir , const uint32_t insn ) {}
1836+ static inline bool op_mvx (rv_insn_t * ir , const uint32_t insn ) {}
1837+
17941838/* handler for all unimplemented opcodes */
17951839static inline bool op_unimp (rv_insn_t * ir UNUSED , uint32_t insn UNUSED )
17961840{
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