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giga: enable wifi using firmware from loader #215

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f73b38e
giga: initial enable wifi support
pennam Aug 25, 2025
0123530
giga: increase CONFIG_HEAP_MEM_POOL_SIZE
pennam Aug 25, 2025
f25c720
giga: increase loader partition
pennam Aug 25, 2025
ccd9ec2
giga: configure networking
pennam Aug 25, 2025
92c4ecd
portentah7: enable wifi
pennam Oct 31, 2025
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4 changes: 2 additions & 2 deletions boards.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -45,7 +45,7 @@ giga.upload.native_usb=true
giga.upload.maximum_size=1966080
giga.upload.maximum_data_size=523624

giga.upload.address=0x080E0000
giga.upload.address=0x08140000

giga.upload.maximum_size=786432
giga.upload.maximum_data_size=523624
Expand Down Expand Up @@ -272,7 +272,7 @@ portentah7.upload.native_usb=true
portentah7.upload.maximum_size=1966080
portentah7.upload.maximum_data_size=523624

portentah7.upload.address=0x080E0000
portentah7.upload.address=0x08140000

portentah7.upload.maximum_size=786432
portentah7.upload.maximum_data_size=523624
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50 changes: 49 additions & 1 deletion variants/arduino_giga_r1_stm32h747xx_m7/arduino_giga_r1_stm32h747xx_m7.conf
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Original file line number Diff line number Diff line change
Expand Up @@ -11,7 +11,7 @@ CONFIG_CDC_ACM_DTE_RATE_CALLBACK_SUPPORT=y

CONFIG_LLEXT_STORAGE_WRITABLE=n
CONFIG_SHARED_MULTI_HEAP=y
CONFIG_HEAP_MEM_POOL_SIZE=2048
CONFIG_HEAP_MEM_POOL_SIZE=24576
CONFIG_SHELL_STACK_SIZE=32768
CONFIG_MAIN_STACK_SIZE=32768
CONFIG_LLEXT_HEAP_SIZE=128
Expand All @@ -35,6 +35,54 @@ CONFIG_SPI_STM32_INTERRUPT=y
CONFIG_ENTROPY_GENERATOR=y
CONFIG_TEST_RANDOM_GENERATOR=y

CONFIG_SDHC=y
CONFIG_SDHC_INIT_PRIORITY=75
CONFIG_SDIO_STACK=y
CONFIG_CYW4343W=y

CONFIG_NETWORKING=y
CONFIG_WIFI=y

CONFIG_POSIX_API=y

CONFIG_NET_TCP=y
CONFIG_NET_SOCKETS=y
CONFIG_NET_IPV6=n
CONFIG_NET_IPV4=y
CONFIG_NET_ARP=y
CONFIG_NET_UDP=y
CONFIG_NET_DHCPV4=y
CONFIG_NET_DHCPV4_OPTION_CALLBACKS=y
CONFIG_NET_SOCKETS_NET_MGMT=y
CONFIG_NET_SOCKETS_SOCKOPT_TLS=y
CONFIG_NET_MGMT=y
CONFIG_NET_MGMT_EVENT=y

CONFIG_DNS_RESOLVER=y
CONFIG_DNS_SERVER_IP_ADDRESSES=y
CONFIG_DNS_SERVER1="8.8.8.8"

CONFIG_NET_CONFIG_AUTO_INIT=n
CONFIG_NET_CONNECTION_MANAGER=y
#CONFIG_WIFI_NM_MAX_MANAGED_INTERFACES=2
CONFIG_NET_L2_WIFI_SHELL=y
CONFIG_NET_MGMT_EVENT_QUEUE_SIZE=32

#CONFIG_INIT_STACKS=y

CONFIG_NET_SHELL=y
CONFIG_NET_L2_ETHERNET_MGMT=y
#CONFIG_WIFI_SHELL=y

CONFIG_LOG=y
CONFIG_LOG_DEFAULT_LEVEL=3
CONFIG_LOG_MODE_MINIMAL=y
CONFIG_LOG_MODE_DEFERRED=y
CONFIG_NET_CORE_LOG_LEVEL_DBG=y
CONFIG_NET_LOG=y
CONFIG_NET_L2_WIFI_MGMT_LOG_LEVEL_DBG=y
CONFIG_WIFI_LOG_LEVEL_DBG=y

CONFIG_VIDEO=y
CONFIG_VIDEO_LOG_LEVEL_DBG=y
CONFIG_VIDEO_STM32_DCMI=y
Expand Down
9 changes: 7 additions & 2 deletions variants/arduino_giga_r1_stm32h747xx_m7/arduino_giga_r1_stm32h747xx_m7.overlay
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Original file line number Diff line number Diff line change
Expand Up @@ -336,8 +336,13 @@

&flash0 {
partitions {
user_sketch: partition@e0000 {
reg = <0x0E0000 0x20000>;
slot0_partition: partition@40000 {
label = "image-0";
reg = <0x40000 0x00100000>;
};

user_sketch: partition@100000 {
reg = <0x140000 0x20000>;
};
};
};
Expand Down
9 changes: 8 additions & 1 deletion variants/arduino_portenta_h7_stm32h747xx_m7/arduino_portenta_h7_stm32h747xx_m7.conf
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Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@ CONFIG_CDC_ACM_DTE_RATE_CALLBACK_SUPPORT=y
CONFIG_LLEXT_STORAGE_WRITABLE=n

CONFIG_SHARED_MULTI_HEAP=y
CONFIG_HEAP_MEM_POOL_SIZE=2048
CONFIG_HEAP_MEM_POOL_SIZE=24576

CONFIG_FPU=y
CONFIG_ICACHE=y
Expand All @@ -35,6 +35,13 @@ CONFIG_SPI_ASYNC=y
CONFIG_SPI_STM32_INTERRUPT=y
CONFIG_I2C_TARGET=y

CONFIG_SDHC=y
CONFIG_SDHC_INIT_PRIORITY=75
CONFIG_SDIO_STACK=y
CONFIG_CYW4343W=y
CONFIG_WIFI=y
CONFIG_NET_L2_WIFI_SHELL=y

CONFIG_NET_CORE_LOG_LEVEL_DBG=y

CONFIG_NETWORKING=y
Expand Down
9 changes: 7 additions & 2 deletions variants/arduino_portenta_h7_stm32h747xx_m7/arduino_portenta_h7_stm32h747xx_m7.overlay
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Original file line number Diff line number Diff line change
Expand Up @@ -278,8 +278,13 @@
#address-cells = <1>;
#size-cells = <1>;

user_sketch: partition@e0000 {
reg = <0x0E0000 0x20000>;
slot0_partition: partition@40000 {
label = "image-0";
reg = <0x40000 0x00100000>;
};

user_sketch: partition@100000 {
reg = <0x140000 0x20000>;
};
};
};
Expand Down