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fix: core: uart: add missing half duplex init #1480

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Merged
merged 2 commits into from
Aug 24, 2021
Merged

fix: core: uart: add missing half duplex init #1480

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87d403e
fix: core: uart: add missing half duplex init
fpistm Aug 13, 2021
c20c31e
fix: Nucleo_H743ZI: clock configuration
fpistm Aug 24, 2021
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24 changes: 20 additions & 4 deletions libraries/SrcWrapper/src/stm32/uart.c
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Original file line number Diff line number Diff line change
Expand Up @@ -334,7 +334,11 @@ void uart_init(serial_t *obj, uint32_t baudrate, uint32_t databits, uint32_t par
HAL_UARTEx_DisableStopMode(huart);
}
/* Trying default LPUART clock source */
if (HAL_UART_Init(huart) == HAL_OK) {
if (uart_rx == NP) {
if (HAL_HalfDuplex_Init(huart) == HAL_OK) {
return;
}
} else if (HAL_UART_Init(huart) == HAL_OK) {
return;
}
/* Trying to change LPUART clock source */
Expand All @@ -350,7 +354,11 @@ void uart_init(serial_t *obj, uint32_t baudrate, uint32_t databits, uint32_t par
__HAL_RCC_LPUART2_CONFIG(RCC_LPUART2CLKSOURCE_LSE);
}
#endif
if (HAL_UART_Init(huart) == HAL_OK) {
if (uart_rx == NP) {
if (HAL_HalfDuplex_Init(huart) == HAL_OK) {
return;
}
} else if (HAL_UART_Init(huart) == HAL_OK) {
return;
}
}
Expand All @@ -363,7 +371,11 @@ void uart_init(serial_t *obj, uint32_t baudrate, uint32_t databits, uint32_t par
__HAL_RCC_LPUART2_CONFIG(RCC_LPUART2CLKSOURCE_HSI);
}
#endif
if (HAL_UART_Init(huart) == HAL_OK) {
if (uart_rx == NP) {
if (HAL_HalfDuplex_Init(huart) == HAL_OK) {
return;
}
} else if (HAL_UART_Init(huart) == HAL_OK) {
return;
}
}
Expand All @@ -376,7 +388,11 @@ void uart_init(serial_t *obj, uint32_t baudrate, uint32_t databits, uint32_t par
__HAL_RCC_LPUART2_CONFIG(RCC_LPUART2CLKSOURCE_PCLK1);
}
#endif
if (HAL_UART_Init(huart) == HAL_OK) {
if (uart_rx == NP) {
if (HAL_HalfDuplex_Init(huart) == HAL_OK) {
return;
}
} else if (HAL_UART_Init(huart) == HAL_OK) {
return;
}
if (obj->uart == LPUART1) {
Expand Down
11 changes: 9 additions & 2 deletions ...Z(G-I)T_H747A(G-I)I_H747I(G-I)T_H750ZBT_H753ZIT_H757AII_H757IIT/variant_NUCLEO_H743ZI.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -364,7 +364,6 @@ WEAK void SystemClock_Config(void)
| RCC_PERIPHCLK_USART234578 | RCC_PERIPHCLK_I2C123
| RCC_PERIPHCLK_I2C4 | RCC_PERIPHCLK_SPI123
| RCC_PERIPHCLK_SPI45 | RCC_PERIPHCLK_SPI6;
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADC;
PeriphClkInitStruct.PLL2.PLL2M = 1;
PeriphClkInitStruct.PLL2.PLL2N = 20;
PeriphClkInitStruct.PLL2.PLL2P = 2;
Expand All @@ -373,11 +372,19 @@ WEAK void SystemClock_Config(void)
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2VCIRANGE_3;
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2VCOMEDIUM;
PeriphClkInitStruct.PLL2.PLL2FRACN = 0.0;
PeriphClkInitStruct.PLL3.PLL3M = 1;
PeriphClkInitStruct.PLL3.PLL3N = 24;
PeriphClkInitStruct.PLL3.PLL3P = 2;
PeriphClkInitStruct.PLL3.PLL3Q = 6;
PeriphClkInitStruct.PLL3.PLL3R = 2;
PeriphClkInitStruct.PLL3.PLL3RGE = RCC_PLL3VCIRANGE_3;
PeriphClkInitStruct.PLL3.PLL3VCOSEL = RCC_PLL3VCOWIDE;
PeriphClkInitStruct.PLL3.PLL3FRACN = 0.0;
PeriphClkInitStruct.AdcClockSelection = RCC_ADCCLKSOURCE_PLL2;
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
PeriphClkInitStruct.QspiClockSelection = RCC_QSPICLKSOURCE_D1HCLK;
PeriphClkInitStruct.SdmmcClockSelection = RCC_SDMMCCLKSOURCE_PLL;
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_D3PCLK1;
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL3;
PeriphClkInitStruct.Usart16ClockSelection = RCC_USART16CLKSOURCE_D2PCLK2;
PeriphClkInitStruct.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_D2PCLK1;
PeriphClkInitStruct.I2c123ClockSelection = RCC_I2C123CLKSOURCE_D2PCLK1;
Expand Down